The invention relates to the technical field of computers, and discloses an FPGA test program updating method and device, electronic equipment and a storage medium. The method comprises the followingsteps: acquiring an initial FPGA bit stream corresponding to an FPGA verification module, and configuring the FPGA verification module according to the initial FPGA bit stream to obtain an initially configured FPGA verification module; obtaining an update test file according to the test task, and generating a partial update bit stream according to the update test file; and configuring the reconfigurable area of the FPGA verification module after initial configuration according to the partial update bit stream so as to realize test program update. Through the dynamic replacement function of thereconfigurable area where the instruction memory is located, updating of the test program is achieved, only one-time integration of the complete FPGA is needed, different test programs generate partof reconstructed bit streams through integration of the reconfigurable area, the size of each bit stream is reduced, and the needed time is shortened.

FPGA test program updating method and device, electronic equipment and storage medium

An information processing apparatus having a reconfigurable circuit capable of rewriting a logic circuit includes, a process determination circuit that determines which of a plurality of processes is to be executed, a standby buffer circuit that holds process data to be used in a process waiting for execution among processes determined by the process determination circuit, and a rewrite control circuit that rewrites the current logic circuit written in the reconfigurable circuit to a logic circuit that executes one of the plurality of processes waiting for execution using each of a plurality of process data held in the standby buffer circuit when the amount of process data held in the standby buffer circuit exceeds a first predetermined amount.

Information processing apparatus and information processing method

Information processing apparatus and information processing method for process order in reconfigurable circuit

Described herein are various technologies pertaining to confirming an integrity of a FPGA. A verifier circuit is placed into an FPGA bitstream to enable external verification of the FPGA configuration in real time without requiring readout of the FPGA configuration itself. Number generators are utilized to generate a key which is shared between the FPGA and an external verification component (VC). The key is utilized to configure an initial state of sequence registers respectively located on both the FPGA and the VC. When the FPGA is operating with an approved configuration, output from the sequence registers at the FPGA and the VC are the same.

Field programmable gate array bitstream verification

Described herein are various technologies pertaining to extracting cryptographic keys from user behavioral biometrics, specifically keystroke dynamics. Such cryptographic keys can be used for, among other things, user authentication throughout computer sessions. Keystroke dynamics are timing data indicating when keys were pressed and when they were released.

Dynamic signature generation from keystroke dynamics

Described herein are various technologies pertaining to randomizing logic associated with dangling nodes in a digital circuit design. A dangling node is an input to or output from a logic gate in the digital circuit design that is identified as not impacting a desired output of the digital circuit design. Randomizing the logic associated with a dangling node can include deleting a logic gate, adding a logic gate, replacing a logic gate with another logic gate, etc. Randomizing the logic associated with the dangling node prevents hardware trojans that may have been inserted into the circuit design from being implemented in a circuit that is generated based upon the design.

Randomization of dangling nodes in a digital circuit design to mitigate hardware trojans

A method for authenticating an additively manufactured (AM) object is disclosed herein A computing device obtains a measurement that is indicative of a stochastic distribution of dopant incorporated into the AM object The computing device generates authentication data for the AM object based upon the measurement, and authenticates the AM object based upon the authentication data

Hamlet Jason

Papers

Field programmable gate array bitstream verification

Dynamic signature generation from keystroke dynamics

Randomization of dangling nodes in a digital circuit design to mitigate hardware trojans

System for authenticating an additively manufactured object