H
Herwig Bruneel
Researcher at Ghent University
Publications - 541
Citations - 5587
Herwig Bruneel is an academic researcher from Ghent University. The author has contributed to research in topics: Queueing theory & Queue. The author has an hindex of 31, co-authored 538 publications receiving 5375 citations. Previous affiliations of Herwig Bruneel include Alcatel-Lucent & Polytechnic University of Valencia.
Papers
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Book
Discrete-time models for communication systems including ATM
Herwig Bruneel,B.G. Kim +1 more
TL;DR: This chapter discusses Discrete-Time Models and Applications, Applications to ATM, and more, which describes the development of the GI-G-1 Model and its applications.
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On the Throughput Performance of Some Continuous ARQ Strategies with Repeated Transmissions
Herwig Bruneel,Marc Moeneclaey +1 more
TL;DR: The paper considers a class of continuous ARQ strategies, whereby multiple copies of each data block are sent contiguously (instead of one single copy), and whereby the data blocks are delivered at the receiver side in their order of arrival at the transmitter.
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Performance of discrete-time queueing systems
TL;DR: A very general discrete-time queueing model with one single server and an infinite waiting room is studied, finding that the number of arrivals during any discrete time-unit as well as the service time of each customer have general probability distributions.
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Queueing behavior of statistical multiplexers with correlated inputs
TL;DR: The author derives a functional equation which describes the full steady-state buffer behavior of the multiplexer and indicates a strong dependency of the mean buffer occupancy on the actual lengths of the active and passive periods of the users, even for a given mean user activity.
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Performance analysis of a single-server ATM queue with a priority scheduling
TL;DR: This paper derives expressions for the probability generating function of the system contents and the cell delay and some performance measures of these quantities will be derived, and used to illustrate the impact and significance of priority scheduling in an ATM output queueing switch.