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Hidefumi Yabara

Researcher at Fujitsu

Publications -  6
Citations -  196

Hidefumi Yabara is an academic researcher from Fujitsu. The author has contributed to research in topics: Charged particle beam & Deflection (engineering). The author has an hindex of 5, co-authored 6 publications receiving 196 citations.

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Patent

Charged-particle-beam exposure device and charged-particle-beam exposure method

TL;DR: In this article, a method of exposing a wafer to a charged-particle beam by directing to the wafer the charged particle beam deflected by a deflector includes the steps of arranging a plurality of first marks at different heights.
Patent

Method of and system for charged particle beam exposure

TL;DR: In this paper, the setting time during a step change in the output of an amplifier is reduced by switching resistance between the amplifier and a deflector, and the response speed is improved by adding auxiliary deflection coils of one or two turns.
Patent

Charged-particle-beam exposure device and method capable of high-speed data reading

TL;DR: In this article, a data processing unit inserts data-position-adjustment data into the control data for each exposure, and a first data-storage unit stores the data, inserted with the data position adjustment data, and outputs the data at a time of the exposure process.
Patent

Digital-to-analog converter having a circuit for compensating for variation in output dependent on temperature change

TL;DR: In this paper, a D/A converter with constant-current output circuits, provided for the n bits of the digital signal, for selectively generating n constant currents on the basis of the n-bits of digital signals, is described.
Patent

Method of providing changed particle beam exposure in which representative aligning marks on an object are detected to calculate an actual position to perform exposure

TL;DR: In this paper, a method for providing charged particle beam exposure onto an object having a plurality of chip areas with a pluralityof aligning marks formed in correspondence to each of said chip areas is presented.