A data decoding device capable of decoding plural kinds of data superimposed in a vertical blanking period of a video signal. The device comprises means for detecting the line number and the intraline position in the vertical blanking period from vertical and horizontal sync signals and generating a line signal extract pulse, a data signal extract pulse and a reference signal extract pulse; binary circuit means for converting the video signal into a binary signal; PLL means for producing a data extract clock signal in synchronism with a clock reference signal extracted on the basis of the line signal extract pulse and the reference signal extract pulse; memory means supplied with the data extract clock signal and the binary signal in response to the line signal extract pulse and the data signal extract pulse, and storing the data signal therein; and control means capable of designating a plurality of durations for generating the respective extract pulses and a plurality of frequency division ratios in the PLL means. In the device, the circuits are usable in common to achieve curtailment in the production cost.

Multistandard video signal decoder

An encoder disconnects video data between a video source and a video using device only during 21H in the vertical blanking interval. During 21H, it applies locally generated coded data signals, in a format detectable by conventional data decoding devices, to the video using device. The video source may be a camera or tape playback, and the using device may be a TV set or a video tape recorder.

Encoder for superimposing encoded character data or command data in the vertical blanking interval for regulating video receiver functions

Multistandard decoder for data stored in the vertical blanking interval of a video signal

A timing control signal generator used in a Teletext signal waveform equalizer to remove waveform distortions in a Teletext signal inserted into a horizontal scanning line for a vertical blanking interval of a television signal and arranged to generate timing control signals for controlling the operation of the waveform equalizer. The timing of each of the timing control signals, at which the level variation thereof occurs, is predetermined. To generate these timing control signals by a small scale circuit arrangement, a pair of counters and a pair of read only memories are used. The first counter is cleared by a field start signal and counts sample clock pulses synchronized with the Teletext signal. The first ROM stores information indicative of level changes of the timing control signals and is accessed by the first counter. The level change information read out from the first ROM is counted by the second counter. The second counter accesses the second ROM which stores level information of the timing control signals at the level change timing of at least one of the timing control signals. The level information of the timing control signals read out from the second ROM is held in a latch circuit, thereby producing the timing control signals.

Timing control signal generator for teletext signal waveform equalizer

A sync apparatus for an image multiplex transmission system includes a first means for determining a fetch phase of each teletext signal packet, and a second means for re-determining the fetch phase when the actual phase of the teletext signal packet satisfies a predetermined condition. In this sync apparatus, when synchronization of the teletext signal packets has discontinuity, the first means determines the packet fetch phase, and when it has continuity, the second means determines the packet fetch phase.

Sync apparatus for image multiplex transmission system

A sampling clock reproducing device wherein binary coded signals representative of letters or other patterns which are superimposed on the television signal and the pilot signal superimposed before the binary coded signals in order to indicate the phase thereof are received, and the phase of the pilot signal is detected whereby clock pulses for sampling the binary coded signals are reproduced.

Hirashima Masayoshi

Papers

Sampling clock reproducing device