The phase-shifting mask consists of a normal transmission mask that has been coated with a transparent layer patterned to ensure that the optical phases of nearest apertures are opposite. Destructive interference between waves from adjacent apertures cancels some diffraction effects and increases the spatial resolution with which such patterns can be projected. A simple theory predicts a near doubling of resolution for illumination with partial incoherence σ < 0.3, and substantial improvements in resolution for σ < 0.7. Initial results obtained with a phase-shifting mask patterned with typical device structures by electron-beam lithography and exposed using a Mann 4800 10× tool reveals a 40-percent increase in usuable resolution with some structures printed at a resolution of 1000 lines/mm. Phase-shifting mask structures can be used to facilitate proximity printing with larger gaps between mask and wafer. Theory indicates that the increase in resolution is accompanied by a minimal decrease in depth of focus. Thus the phase-shifting mask may be the most desirable device for enhancing optical lithography resolution in the VLSI/VHSIC era.

Improving resolution in photolithography with a phase-shifting mask

The theory of image formation is formulated in terms of the coherence function in the object plane, the diffraction distribution function of the image-forming system and a function describing the structure of the object. There results a four-fold integral involving these functions, and the complex conjugate functions of the latter two. This integral is evaluated in terms of the Fourier transforms of the coherence function, the diffraction distribution function and its complex conjugate. In fact, these transforms are respectively the distribution of intensity in an 'effective source', and the complex transmission of the optical system-they are the data initially known and are generally of simple form. A generalized 'transmission factor' is found which reduces to the known results in the simple cases of perfect coherence and complete incoherence. The procedure may be varied in a manner more suited to non-periodic objects. The theory is applied to study inter alia the influence of the method of illumination on the images of simple periodic structures and of an isolated line.

On the diffraction theory of optical images

A method and apparatus for creating a phase shifting mask and a structure mask for shrinking integrated circuit designs. One embodiment of the invention includes using a two mask process. The first mask is a phase shift mask and the second mask is a single phase structure mask. The phase shift mask primarily defines regions requiring phase shifting. The single phase structure mask primarily defines regions not requiring phase shifting. The single phase structure mask also prevents the erasure of the phase shifting regions and prevents the creation of undesirable artifact regions that would otherwise be created by the phase shift mask. Both masks are derived from a set of masks used in a larger minimum dimension process technology.

Phase shifting circuit manufacture method and apparatus

A method is disclosed for identifying regions of an integrated circuit layout design where optical proximity correction will be most useful and then performing optical proximity correction on those regions only. More specifically, the method includes the following steps: (a) analyzing an integrated circuit layout design with a design rule checker to locate features of the integrated circuit layout design meeting predefined criteria; and (b) performing optical proximity correction on the features meeting the criteria in order to generate a reticle design. The criteria employed by the design rule checker to select features include outside corners on patterns, inside corners on features, feature size, feature shape, and feature angles.

Performing optical proximity correction with the aid of design rule checkers

A method for performing design rule checking on OPC corrected or otherwise corrected designs is described. This method comprises accessing a corrected design and generating a simulated image. The simulated image corresponds to a simulation of an image which would be printed on a wafer if the wafer were exposed to an illumination source directed through the corrected design. The characteristics of the illumination source are determined by a set of lithography parameters. In creating the image, additional characteristics can be used to simulate portions of the fabrication process. However, what is important is that a resulting simulated image is created. The simulated image can then be used by the design rule checker. Importantly, the simulated image can be processed to reduce the number of vertices in the simulated image, relative to the number of vertices in the OPC corrected design layout. Also, the simulated image can be compared with an idea layout image, the results of which can then be used to reduce the amount of information that is needed to perform the design rule checking.

Design rule checking system and method

We have developed an optical proximity effect correction (OPC) flow for both, the repetitive memory cell patterns by a simulation-based method and for the random logic application specific IC (ASIC) patterns by a rule-based method. Application results for a 0.28 µm static random access memory (SRAM) cell and 0.25 µm ASIC devices have shown that correction time and final data size were feasible for conventional layout design flow and mask fabrication. Also, our system has achieved significant improvement with respect to pattern printing fidelity between designed and printed resist patterns. In addition to this, an automatic alternative phase shift mask (PSM) pattern layout tool has been developed. Using the tool with a double exposure method, 0.16 µm gate patterns for both logic and dynamic random access memory (DRAM) have been obtained with a positive photoresist. The developed lithography computer aided design (CAD) technology has improved the accuracy of pattern formation for state of the art device fabrication. The fabricated patterns have satisfied the required linewidth accuracy, within ±10% of the design value, ones under the practical exposure-focus window.

http://iopscience.iop.org/article/10.1143/JJAP.37.6686/pdf

Lithography computer aided design technology for embedded memory in logic

Defect printability of attenuated phase-shifting masks for a dot defect in isolated hole and space patterns is evaluated by EDM (exposure-defocus and mask fabrication latitudes) process windows and process latitude functions which are derived from a series of EDM windows. The allowable defect size is confirmed to be 0.08 (lambda) /NA both for the hole and space patterns with the practical process latitude consideration. By the evaluation of the process latitude functions, it is found that an influence range by the dot defect is extended up to 20 times of the defect size in units on a wafer.

Defect printability study of attenuated phase-shifting masks for specifying inspection sensitivity

For the fine patterning of gate layers on embedded DRAM is logic devices with a design rule of 0.13 micrometers and below, we have optimized the double exposure technique with an alternative phase shifting mask using KrF excimer laser exposure. Based on the study over lithography process latitude with respect to exposure-defocus window, overlay margin and mask fabrication feasibility, we have adopted a process as that patterns in logic circuits are delineated by the combination of alt-PSM and a trim mask made of Cr shielding patterns on an attenuated phase shifting mask, while patterns in DRAM cells are delineated by the latter att-PSM exposure only. With considering a mask error enhancement factor, optical condition and optical proximity effect correction for the alt-PSM and trim mask are also optimized, then, 0.13 micrometers embedded DRAM in logic patterns have been fabricated with a sufficient common lithography process window by the KrF excimer laser exposure.

Method of expanding process window for the double exposure technique with alt-PSMs

Changes in chemical nature of an ArF photoresist caused by various plasmas were analyzed, and it was found that the HBr plasma treatment induces a selective detachment of a heterocyclic unit of the photoresist, and the detached unit remains in the photoresist film. Thermomechanical analyses were performed, which showed that the softening temperature of the photoresist decreases by the HBr treatment, indicating that the detached heterocyclic unit acts as a plasticizer in the photoresist film. These results showed that the HBr treatment can be regarded as a softening process of the photoresist. This HBr treatment was applied to the fabrication of line patterns and it was shown that the treatment remarkably improves LWR (line width roughness) after etching. This improvement was more pronounced for the case of an isolated pattern than the case of a dense pattern. Further investigations on the HBr treatment were performed by changing the copolymerization ratio of a monomer containing the heterocyclic unit. It was shown that the reduction of LWR by the HBr treatment becomes more enhanced when the copolymerization ratio increases. However, an intensive HBr treatment was found to deteriorate LWR, showing that there is an optimum condition of the HBr treatment in terms of improving LWR.

Changes of chemical nature of photoresists induced by various plasma treatments and their impact on LWR

Practical evaluation method for optical proximity effect correction (OPC) feasibility is newly proposed using EDM (Exposure-Defocus and Mask fabrication latitude) methodology. In this method, printed image on a wafer is characterized by process latitude functions derived from EDM methodology in terms of exposure latitude, depth of focus, and mask line width latitude. In this paper, effectiveness of the process latitude functions will be verified by applying them to intraproximity effect evaluation for isolated lines and angled lines, and also to interproximity effect evaluation for T-shaped patterns and lines & spaces (L/S) patterns in i-line lithography.

Hiroichi Kawahira

Papers

Lithography computer aided design technology for embedded memory in logic

Defect printability study of attenuated phase-shifting masks for specifying inspection sensitivity

Method of expanding process window for the double exposure technique with alt-PSMs

Changes of chemical nature of photoresists induced by various plasma treatments and their impact on LWR

Practical evaluation of optical-proximity effect correction by EDM methodology