Waveform distortion in lossy transmission lines is getting serious in long traces in PCBs in GHz domain. So far this signal-integrity (SI) degradation problem has been solved with some active devices, such as equalizer, pre-emphasizer or de-emphasizer. These devices however require unnecessary power-consumption, cost, and packaging area. We have proposed a novel PCB trace structure called “Segmental Transmission Line (STL)” already in order to reduce reflection noises in the bus wires. In this paper, we firstly apply the STL to restore the waveforms distorted in the lossy transmission line without the active devices. We design and fabricate an STL prototype, and demonstrate that the eye-diagram distorted in the lossy transmission line is improved dramatically more than twice in its eye-height in the STL.

Signal integrity improvement in lossy transmission line using segmental transmission line

Frequency of the digital signal in PCBs has remained at about 1 GHz, while that in VLSIs become more than several GHz. The frequency gap comes from signal integrity (SI) deterioration in PCB in GHz-domain. To overcome this problem, we have already proposed segmental transmission line, in which genetic algorithm is used to solve the combinatorial explosion problem in the design. In this paper, we propose a novel fitness based on the eye-diagram, which is widely and generally used for SI evaluation in the high-speed interconnection design field. And we also propose a high-speed eye-diagram calculation method based on virtual eye-diagram. This eye-diagram is constructed by superposing the single-shot pulse responses and can reduce the simulation time. The simulation experiments demonstrate that our proposed fitness increases the eye height and eye width by 3.07 and 1.06 times, respectively, compared with the conventional one.

Evolutionary design of high signal integrity interconnection based on eye-diagram

In the high-speed data transmissions in GHz domain,such as PCIe (Gen.5) and USB 5.0, slight impedance mismatching caused by via-holes and/or through-holes, or other small parasiticelements in the traces in printed circuit board (PCBs) causes serious deterioration of signal integrity (SI). And it is becoming next to impossible to ensure the SI by using the conventional impedance matching techniques as the frequency increases. In order toovercome this problem, we propose a novel high signal integrity transmission line structure called “Capacitor Segmental Transmission Line (C-STL)”. The C-STL is a novel signal integrity improving technique that makes use of not the characteristic impedance matching but the mismatching. In the C- STL, we use small microchip capacitors embedded in the PCB under the trace, and superpose the intentional reflections,which cause from the capacitors, onto the target distorted signal waves to restore them to ideal waveforms. In this paper, we also propose the design methodology of the C-STL and demonstrate its effectiveness using simulations and prototype measurements.

High Signal Integrity Transmission Line Using Microchip Capacitors and its Design Methodology

We have proposed a novel transmission line structure called “segmental transmission line (STL)” in order to ensure high signal integrity (SI) in PCB traces already and we have also shown its high SI improvement capability in eye-diagrams. In this paper, we evaluate the STL from the real-world application view point for the first time, which is indispensable for next development step. As one of applications, we choose image-data transmission at 5 Gbps and 7.5 Gbps data-rate, and demonstrate that the STL can transmit much higher quality image-data than the conventional transmission line by not only simulations but by a 500 Mbps STL scale-up prototype. We also calculate bit error rates (BERs) and show that BERs in the conventional transmission line decrease to 1/14 and 1/25 at 5 Gbps and 7.5 Gbps, respectively in the STL.

http://ieeexplore.ieee.org/iel7/6713793/6724381/06724401.pdf

Signal integrity evaluation of segmental transmission line under real-world application

So far, the only effective way to decrease crosstalk-noise has been to widen space or to put shield trace between traces in PCBs. On the other hand, crosstalk-noise increases as the frequency increases, so that novel approaches to reduce the crosstalk-noise are strongly required in the GHz domain. We have applied a new trace structure “Segmental Transmission Line (STL)” to the crosstalk-noise reduction already and have shown its fundamental effectiveness for the clock signal transmission. In this paper, we apply the STL to reduce crosstalk-noises caused by random data signal in GHz domain and demonstrate that the STL can reduce the crosstalk-noise to about half of it in the uniform-width trace.

Crosstalk-noise reduction in GHz domain using segmental transmission line

In the GHz-domain, high signal-integrity (SI) is strongly demanded in PCB traces. Unfortunately, however, conventional techniques based on the characteristic-impedance-matching cannot work well in the GHz digital signals. In order to overcome this problem, we have proposed a novel PCB-trace structure called “Segmental-Transmission-Line (STL)” already. In this paper, we apply the STL to the 5 GHz differential transmission line and show its remarkable SI improvement ratios of 3.38 and 1.7 in the eye-height and eye-width, respectively.

Signal-integrity improvement based on the segmental-transmission-line

High signal integrity (SI) is strongly required in PCB traces under GHz clock frequencies for the next generation of VLSI packaging. Unfortunately, however, conventional techniques based on characteristic impedance matching cannot work well with GHz digital signals. In order to overcome this problem, we have previously proposed a novel PCB trace structure called "Segmental Transmission Line (STL)." In this paper, we design STLs for GHz bus-systems in which a high SI is indispensable, and demonstrate the high effectiveness of the STL showing the waveforms observed in the STL prototypes. Furthermore, the STL is analyzed in the frequency domain to demonstrate its mechanism of high robustness against frequency fluctuations.

http://www.jiep.or.jp/hp_e/journal/4/transaction4_1_44-51.pdf

A High-Signal-Integrity PCB Trace Composed of Multiple Segments for GHz VLSI Packaging: Its Prototyping and Performance Analysis

High signal integrity (SI) is an important aspect of the design of printed circuit boards (PCBs) with clock frequencies in the GHz range. Unfortunately, conventional PCB trace designs based on the matching of characteristic impedances do not work well with GHz digital signals. In order to overcome this difficulty, we previously proposed a novel PCB trace structure, the segmental transmission line (STL), in which the trace design is optimized using genetic algorithms (GAs). In this paper, we apply the STL to high-speed double data rate (DDR) memory-bus systems, backplane bus systems for basic servers, and high-density trace bus systems. We show that the performance of the STL on those real world applications has high SI by using real measurements on their prototypes.

http://ieeexplore.ieee.org/iel7/7000191/7008710/07008718.pdf

Segmental transmission line: Its practical application the optimized PCB trace design using a genetic algorithm

As the digital signal frequency in printed circuit boards (PCBs) increases, waveform distortion, or the signal integrity (SI) problem, is getting more and more serious. The reason the SI problem is becoming serious is that wires or traces need to be regarded as transmission lines which are sensitive to electric noise. In order to overcome this problem, we have proposed a novel methodology called a segmental transmission line (STL), and have shown its effectiveness using computer simulations and fundamental prototypes. However, in the STL design, the combinatorial explosion problem occurs. To solve this problem, a genetic algorithm (GA) was used to design the STL. In this article, we apply the STL to a bus system that includes inductances, which come from the very-large-scale integration (VLSI) packaging. We evaluated the STL in simulation experiments as well as actual experiments using prototypes, and obtained a maximum improvement ratio of 1.53 in the actual experiment.

Hiroki Shimada

Papers

Signal-integrity improvement based on the segmental-transmission-line

Signal integrity improvement in lossy transmission line using segmental transmission line

A High-Signal-Integrity PCB Trace Composed of Multiple Segments for GHz VLSI Packaging: Its Prototyping and Performance Analysis

Segmental transmission line: Its practical application the optimized PCB trace design using a genetic algorithm

Digital-signal-waveform improvement on VLSI packaging including inductances