The broadcast nature of a wireless link provides a natural eavesdropping and intervention capability to an adversary. Thus, securing a wireless link is essential to the security of a wireless network, and key generation algorithms are necessary for securing wireless links. However, traditional key agreement algorithms can be very costly in many settings, e.g. in wireless ad-hoc networks, since they consume scarce resources such as bandwidth and battery power.Traditional key agreement algorithms are not suitable for wireless ad-hoc networks since they consume scarce resources such as bandwidth and battery power.This paper presents a novel approach that couples the physical layer characteristics of wireless networks with key generation algorithms. It is based on the wireless communication phenomenon known as the principle of reciprocity which states that in the absence of interference both transmitter and receiver experience the same signal envelope. The key-observation here is that the signal envelope information can provide to the two transceivers two correlated random sources that provide sufficient amounts of entropy which can be used to extract a cryptographic key. In contrast, it is virtually impossible for a third party, which is not located at one of the transceiver's position, to obtain or predict the exact envelope; thus retrieve the key. Since in the presence of interference strict reciprocity property can not be maintained; our methodology is based on detecting deep fades to extract correlated bitstrings. In particular, we show how a pair of transceivers can reconcile such bitstrings and finally flatten their distribution to reach key agreement. In our constructions we use cryptographic tools related to randomness extraction and information reconciliation. We introduce "secure fuzzy information reconciliators" a tool that enables us to describe robust key generation systems in our setting. Finally we provide a computational study that presents a simulation of a wireless channel that demonstrates the feasibility of our approach and justifies the assumptions made in our analysis.

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Robust key generation from signal envelopes in wireless networks

An error correction system is disclosed comprising an encoder operable to generate an encoded codeword of a polynomial code over a Galois field GF(q) comprising q elements, wherein the encoded codeword comprises an input data sequence, at least one check symbol, and redundancy symbols. A decoder decodes a received codeword into the encoded codeword by correcting at least one error in the received codeword to generate a corrected codeword, evaluating at least one symbol of the corrected codeword relative to the check symbol in order to detect a shift error, and when the shift error is detected, shift the corrected codeword to correct the shift error.

Error correction code for correcting shift and additive errors

The present invention presents a non-volatile memory and method for its operation that allows instant and accurate detection of erased sectors when the sectors contain a low number of zero bits, due to malfunctioning cells or other problems, and the sector can still be used as the number of corrupted bits is under the ECC correction limit. This method allows the storage system to become tolerant to erased sectors corruption, as such sectors can be used for further data storage if the system can correct this error later in the written data by ECC correction means.

Erased sector detection mechanisms

A method, system, and data structure for encoding a block of data with redundancy information and for correction of erasure type errors in the block using the redundancy data. In particular, the invention is particularly applicable to disk array storage subsystems which are capable of recovering from total or partial failures of one or two disks in the disk array. Still more specifically, the invention is applicable to RAID level 6 storage devices. A given data block of data is translated into a code block of n 2 elements including 2n XOR parity elements for redundancy. Each code block is manipulated as a square matrix, of n 2 elements with parity elements along the major diagonals of the matrix and data elements in the remainder of the matrix. Each parity element is a dependent variable whose value is the XOR sum of the (n-2) data elements in a minor diagonal which intersects it. If the elements in any one or two columns or one or two rows are erased, their values can be generated from the other elements in the matrix. The invention therefore allows for recovery from data loss resulting from complete failure of any one or two disks in the disk array. Further, since the invention recovers all erased elements in any one or two rows, it allows recovery from data loss resulting from correlated partial failure of all disks in the disk array. Still further, the invention allows recovery from many uncorrelated failure patterns in the storage domain of disk drives in a disk array.

Block coding method and system for failure recovery in disk arrays

The disclosed technology provides systems and methods for encoding data based on a run-length-limited code and an error correction code to provide codewords. The codewords include RLL-encoded data that are produced based on the RLL code, and parity information that are produced based on the error correction code. The parity information is interleaved among the RLL-encoded data. In one embodiment, the codeword is produced by separately producing the RLL-encoded data and the parity information, and interleaving the parity information among the RLL-encoded data. In one embodiment, the codeword is produced by producing the RLL-encoded data, and using erasure decoding to compute the parity information.

Systems and methods for achieving higher coding rate using parity interleaving

Channel encoded data (for example run length limited encoded data) is further encoded in accordance with a shift correction code prior to transmission. Upon reception, forward and backward shift errors present in the received channel encoded data are corrected by a shift correction decoder. The shift error correction is accomplished using a code, such as (for example) a BCH code over GF(p) or a negacyclic code, which treats each received symbol as a vector having p states. For a single shift error correction, p=3 and there are three states (forward shift, backward shift, no shift). In one embodiment, conventional error correction codewords which encode the user data may be interleaved within successive shift correction codewords prior to channel encoding, thereby enabling the error correction system to easily handle a high rate of randomly distributed shift errors (which otherwise would result in a high rate of short error bursts that exceed the capacity of the block error correction code).

Shift correcting code for channel encoded data

In a shift correction decoder which processes d,k-constrained RLL data that is encoded in accordance with a shift correction code whose symbols in GF(p) comprise modulo p reductions of cumulative sums of successive run symbols of the RLL data (where p is an odd prime), additive errors (i.e., drop-out and drop-in errors) in the received RLL data are corrected by relying in part on information pertaining to the sequence of the polarities of successive 1-bits in the received RLL data. The polarity information is used to either insert missing 1-bits (due to drop-outs) or delete spurious 1-bits (due to drop-ins) and specify to the shift correction decoder the location of an additive error as an erasure. Synchronization slips are corrected by pre-multiplying the received codeword polynomial by a factor which reduces to two the number of errors created by a single synchronization slip. GF(p) is selected such that p≦k-d+ 1 and the minimum distance of the shift correction code is selected to be sufficient to enable correction of a limited number of shift errors, additive errors and synchronization slips within one received codeword.

Shift correction code system for correcting additive errors and synchronization slips

In a shift-correcting code which represents (d,k)-constrained run-length-limited (RLL) channel data as symbols drawn from GF(p m ), the encoding process produces a set of redundant parity ternary GF(p m ) symbols representing three shift error conditions: forward shift, backward shift and no shift, for p=3 and m=1 for example. The encoder of the invention transforms the parity symbols into (d,k)-constrained RLL channel bits to produce a binary data sequence that can be inserted in the RLL channel data stream without a large number of linking bits to maintain compliance with the (d,k) RLL constraints. A shift error in the RLL channel data representing parity symbols affects no more than one decoded parity symbol. The encoder of the invention efficiently transforms ternary symbols into (d,k)-constrained binary data by coding successive ternary symbols into one of six binary channel words in accordance with (a) the contents of the input ternary symbol and (b) the current state of the encoder, and sets its state to one of two states in preparation for encoding the next ternary symbol. In the first state, the encoder generates one of three channel words each comprising two bits preceded by b zeroes and in the second state generates one of three channel words each comprising two bits preceded by a one and b-1 zeroes, where b is related to d and k so as to maintain the (d,k)-constraints of a number of practically useful RLL codes.

Shift-correcting code system with efficient symbol-to-channel bit transformation

A method for coding/decoding ternary symbols to d,k-constrained binary runs in a way that (i) associates (codes) a number of ternary symbols with a lesser number of d,k-constrained binary runs and (ii) provides that an individual single-shift error in any of the received binary runs that constitute a binary data codeword will cause at most one ternary symbol to be in error in the associated (decoded) ternary symbol codeword. This method allows shift-correction codeword parity checks to be transmitted (i.e., transformed to a d,k-constrained channel data sequence) with increased efficiency, so that the required number of channel bits needed to represent the parity checks is decreased.

Hugh M. Hilden

Papers

Shift correcting code for channel encoded data

Shift correction code system for correcting additive errors and synchronization slips

Shift-correcting code system with efficient symbol-to-channel bit transformation

Shift-correction code rate-enhancing parity encoding/decoding