The past decade has witnessed substantial progress towards the application of low-rate speech coders to civilian and military communications as well as computer-related voice applications. Central to this progress has been the development of new speech coders capable of producing high-quality speech at low data rates. Most of these coders incorporate mechanisms to: represent the spectral properties of speech, provide for speech waveform matching, and "optimize" the coder's performance for the human ear. A number of these coders have already been adopted in national and international cellular telephony standards. The objective of this paper is to provide a tutorial overview of speech coding methodologies with emphasis on those algorithms that are part of the recent low-rate standards for cellular communications. Although the emphasis is on the new low-rate coders, we attempt to provide a comprehensive survey by covering some of the traditional methodologies as well. We feel that this approach will not only point out key references but will also provide valuable background to the beginner. The paper starts with a historical perspective and continues with a brief discussion on the speech properties and performance measures. We then proceed with descriptions of waveform coders, sinusoidal transform coders, linear predictive vocoders, and analysis-by-synthesis linear predictive coders. Finally, we present concluding remarks followed by a discussion of opportunities for future research. >

Speech coding: a tutorial review

Preface. 1. Introduction. 2. Signal Processing Essentials. 3. Quantization and Entropy Coding. 4. Linear Prediction in Narrowband and Wideband Coding. 5. Psychoacoustic Principles. 6. Time-Frequency Analysis: Filter Banks and Transforms. 7. Transform Coders. 8. Subband Coders. 9. Sinusoidal Coders. 10. Audio Coding Standards and Algorithms. 11. Lossless Audio Coding and Digital Watermarking. 12. Quality Measures for Perceptual Audio Coding. References. Index.

http://jdsp.engineering.asu.edu/books/cover-page-audio+contents.pdf

Audio Signal Processing and Coding

At bit rates between 4 and 16 kbit/s, many state-of-the-art speech coding algorithms fall into the class of linear-prediction based analysis-by-synthesis (LPAS) speech coders. At the lower bit rates the waveform-matching, on which LPAS coders rely, constrains the speech quality. To overcome this drawback, we present a coder (RCELP) that uses a generalization of the analysis-by-synthesis paradigm. This generalization relaxes the waveform-matching constraints without affecting speech quality. We describe several implementations at bit rates between 4 and 6 kbit/s. MOS tests show that a 6 kbit/s RCELP has a quality similar or better than the 13 kbit/s GSM full-rate coder, and a 4.4 kbit/s RCELP has a speech quality significantly better than the 4.8 kbit/s FS1016 standard.

The RCELP speech‐coding algorithm

Commencing with a brief history of mobile communications and the portrayal of the basic concept of wireless multimedia communications, the implications of Shannon's theorems regarding joint source and channel coding for wireless communications are addressed. Following a brief introduction to speech, video, and graphical source coding as well as the cellular concept, a rudimentary overview of flexible, reconfigurable, mobile radio schemes is provided. We then summarize the fundamental concepts of modulation, introduce an adaptive modem scheme, and argue that third-generation transceivers might become adaptively reconfigurable under network control in order to meet backward compatibility requirements with existing systems and to achieve best compromise among a range of conflicting system requirements, complexity and power consumption, robustness against channel errors, etc.

/pdf/bandwidth-efficient-wireless-multimedia-communications-1r3ruxbw65.pdf

Bandwidth-efficient wireless multimedia communications

This paper describes efficient architectures for FIR filters. By exploiting the reduced complexity made possible by the use of two powers-of-two coefficients, these architectures allow the implementation of high sampling rate filters of significant length on a single field-programmable gate array (FPGA). >

/pdf/efficient-fir-filter-architectures-suitable-for-fpga-5et2i60wk4.pdf

Efficient FIR filter architectures suitable for FPGA implementation

Techniques for improving the performance of CELP (code excited linear prediction)-type speech coders while maintaining reasonable computational complexity are explored. A harmonic noise weighting function, which enhances the perceptual quality of the processed speech, is introduced. The combination of harmonic noise weighting and subsample pitch lag resolution significantly improves the coder performance for voiced speech. Strategies for reducing the speech coder's data rate, while maintaining speech quality, are presented. These include a method for efficient encoding of the long-term predictor lags, utilization of multiple gain vector quantizers, and a multimode definition of the speech coder frame. A 5.9-kb/s VSELP speech coder that incorporates these features is described. Complexity reduction techniques which allow the coder to be implemented using a single fixed-point DSP (digital signal processor) are discussed. >

Techniques for improving the performance of CELP-type speech coders

Techniques for improving the performance of CELP (code excited linear prediction) type speech coders while maintaining reasonable computational complexity are explored. A harmonic noise weighting function which enhances the perceptual quality of the processed speech is introduced. The combination of harmonic noise weighting and subsample resolution pitch significantly improves the coder performance for voiced speech. A 6.9 kb/s VSELP speech coder which incorporates subsample resolution pitch and harmonic noise weighting is described. Complexity reduction techniques are discussed which allow the coder to be implemented using a single fixed point digital signal processor. >

Techniques for improving the performance of CELP type speech coders

The architecture and features of the Motorola DSP56200 are described. The DSP56200 is an algorithm-specific cascadable digital signal processing peripheral designed to perform the computationally intensive tasks associated with finite impulse response (FIR) and adaptive FIR digital filtering applications. The DSP56200 is implemented in high-performance, low-power 1.5- mu m HCMOS technology and is available in a 28-pin DIP package. The on-chip computation unit includes a 97.5-ns 24-bit*24-bit coefficient RAM, and a 256-bit*16-bit data RAM. Three modes of operation allow the part to be used as a single, dual, or single adaptive FIR filter, with up to 256 taps per chip. In the adaptive mode, the part performs the FIR filtering and least-mean-square (LMS) coefficient update operations for a single tap in 195 ns, permitting use of the part as a 19-kHz sampling rate, 256-tap adaptive FIR filter. A programmable DC tap, coefficient leakage, and adaptation coefficient parameters in the adaptive FIR mode allow the DSP56200 to be used in a wide variety of adaptive FIR filtering applications. The performance of the part in an echo canceler configuration is presented. Typical applications of the part are also described. >

I.A. Gerson

Papers

Techniques for improving the performance of CELP-type speech coders

Techniques for improving the performance of CELP type speech coders

A flexible adaptive FIR filter VLSI IC