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Isao Shirakawa

Researcher at University of Hyogo

Publications -  240
Citations -  2106

Isao Shirakawa is an academic researcher from University of Hyogo. The author has contributed to research in topics: Very-large-scale integration & Routing (electronic design automation). The author has an hindex of 17, co-authored 240 publications receiving 2060 citations. Previous affiliations of Isao Shirakawa include Osaka University.

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A New Algorithm for Generating All the Maximal Independent Sets

TL;DR: This paper presents a new efficient algorithm for generating all the maximal independent sets, for which processing time and memory space are bounded by $O(nm\mu)$ and $O (n+m)$, respectively, where n, m, and $\mu$ are the numbers of vertices, edges, and maximalIndependent sets of a graph.
Journal ArticleDOI

An Algorithm to Enumerate All Cutsets of a Graph in Linear Time per Cutset

TL;DR: Two new algorithms are proposed for enumerating all the cutsets or all the s-t cutsets separatmg two spectfied verttces s and t m an undirected graph and how good the performance of the old algorithm is, when a given graph is "dense."
Proceedings ArticleDOI

An object code compression approach to embedded processors

TL;DR: A low-power processor architecture is described dedicatedly for embedded application programs by means of an object code compression approach that unifies duplicated instructions existing in the embedded program and assigns a compressed object code to such an instruction.
Journal ArticleDOI

The multilayer routing problem: Algorithms and necessary and sufficient conditions for the single-row, single-layer case

TL;DR: An easily implementable sufficient condition on the routability of a net list over a single row of nodes is presented and the solution is an improvement over the worst-case prediction of So.
Proceedings ArticleDOI

Links-1 - a parallel pipelined multimicrocomputer system for image creation

TL;DR: A multimicrocomputer system is described, stressing mainly software and hardware architectures, which has been constructed mainly for image creation, and an intercomputer memory swapping unit is introduced.