Starting with the implantable pacemaker, microelectronic implants have been around for more than 50 years. A plethora of commercial and research-oriented devices have been developed so far for a wide range of biomedical applications. In view of an envisioned expanding implant market in the years to come, our ongoing research work is focusing on the specification and design of a novel biomedical microprocessor core, carefully tailored to a large subset of existing and future biomedical applications. Towards this end, we have taken steps in identifying various tasks commonly required by such applications and profiling their behavior and requirements. One such task is decryption of incoming commands to an implant and encryption of outgoing (telemetered) biological data. Secure bidirectional information relaying in implants has been largely overlooked so far although protection of personal (biological) data is very crucial. In this context, we evaluate a large number of symmetric (block) ciphers in terms of various metrics: average and peak power consumption, total energy budget, encryption rate and efficiency, program-code size and security level. For our study we use XTREM, a performance and power simulator for Intel's XScale embedded processor. Findings indicate the best-performing ciphers across most metrics to be MISTY1 (scores high in 5 out of 6 imposed metrics), IDEA and RC6 (both present in 4 out of 6 metrics). Further profiling of MISTY1 indicates a clear dominance of load/store, move and logic-operation instructions which gives us explicit directions for designing the architecture of our novel processor.

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Profiling of symmetric-encryption algorithms for a novel biomedical-implant architecture

A single-chip pacemaker chip has been developed which integrates high-level sampled-data analog functions on the same chip with an 8-bit microcomputer. It uses circuit techniques to reduce power and insure long-term stability. Current-drain is typically 8 mu A and minimum operating voltage is 1.7 V. The chip is described in the context of the systems choices available in design implantable medical devices. >

An 8-bit microcomputer with analog subsystems for implantable biomedical application

So far, design and deployment of microelectronic, implantable devices has largely had a strongly ldquoad-hocrdquo character. The majority of existing devices has been custom-tailored to the specific application in mind, in an effort to abide by strict design constraints on safety as well as power and size. However, an enabling technology and the fact that implants are gradually becoming mainstream market products calls for a more structured design approach. Towards that end, in this paper we present ImpBench, a novel benchmark suite meant for designing and evaluating new digital processors for microelectronic implants. In an application field as wide as the various pathoses of the human body, we have conceptualized this suite based on common-sense and market-driven indicators, and we have established its usefulness and uniqueness based on extensive experimental measurement. The suite consists of eight carefully selected programs, chosen on the basis of popularity among contemporary and emerging implant applications. MiBench being the closest to our application field, that is embedded systems, has been used for a detailed comparative study. Since implants are required to perform control-, processing- or I/O-intensive tasks, various benchmark characteristics have been studied, namely: performance (IPC), cache and branch-prediction behavior, instruction distribution and power consumption. Results display significant variation from existing benchmarks to justify the need for and usefulness of ImpBench.

/pdf/impbench-a-novel-benchmark-suite-for-biomedical-ux83u1tjxr.pdf

ImpBench: A novel benchmark suite for biomedical, microelectronic implants

PERC, a custom microprocessor designed for use with an implantable biotelemetry system, is discussed. The system consists of the processor and a number of peripheral chips (such as A/D converters and a telemetry unit) connected through a serial bus. The system requires flexibility in programming, high reliability, and low power consumption. The microprocessor supports these requirements with the ability to be programmed through the telemetry unit and with on-chip timers, on-chip RAM, and special instructions for processing data samples and controlling the system. >

A custom microprocessor for implantable telemetry systems

A description is presented of a single-chip, microcomputer-based pacemaker system in which high-level analog functions are integrated on the same IC as a 8-bit microcomputer and a DC-DC converter. Low voltage and low current techniques are used, as well as circuitry to compensate for any long-term drift of transistor characteristics. Each functional block is programmable and can therefore be used in a variety of other implantable, biomedical applications. >

An 8-bit microcomputer with analog subsystems for implantable biomedical applications

Two sense amplifiers capable of sensing 05mV haversine waves and two output amplifiers with 1-12mA outputs, combined with a 4b microprocessor on a CMOS 35,600 square mil chip, to produce a single chip, implantable pacer, with eight programmable modes, will be reported

J. Berkman

Papers

Biomedical microprocessor with analog I/O