Integrated microchannel liquid-cooling technology is envisioned as a viable solution to alleviate an increasing thermal stress imposed by 3D stacked ICs Thermal modeling for microchannel cooling is challenging due to its complicated thermal-wake effect, a localized temperature wake phenomenon downstream of a heated source in the flow This paper presents a fast and accurate thermal-wake aware thermal model for integrated microchannel 3D ICs Validation results show the proposed thermal model achieves more than 400x speed up and only 20% error in comparison with a commercial numerical simulation tool We also demonstrate the use of the proposed thermal model for thermal optimization during the IC placement stage We find that due to the thermal-wake effect, tiles are placed in the descending order of power magnitude along the flow direction We also find that modeling thermal-wakes is critical for generating a thermal-aware placement for integrated microchannel-cooled 3D IC It could result in up to 25˚C peak temperature difference according to our experiments Categories and Subject Descriptors B72 [Integrated Circuits]: Design Aids General Terms Design, Performance

Thermal modeling for 3D-ICs with integrated microchannel cooling

Integrated microchannel liquid-cooling technology is envisioned as a viable solution to alleviate an increasing thermal stress imposed by 3-D stacked ICs. Thermal modeling for microchannel cooling is challenging due to its complicated thermal-wake effect, a localized temperature wake phenomenon downstream of a heated source in the flow. This paper presents a fast and accurate thermal-wake aware thermal model for integrated microchannel 3-D ICs. A combination of the microchannel thermal-wake function and the channel merging technique achieves more than 3300× speedup with less than 5% error in comparison with a commercial numerical finite volume simulation tool. With the proposed model, we characterize thermal behaviors of microchannel-cooled 3-D ICs and compare them with the case of conventional air-cooled 3-D ICs. We also demonstrate thermal-aware placements using our thermal model. It shows that the proposed model can be used to reduce peak temperatures, which is considered important for 3-D IC designs.

Thermal Modeling and Analysis for 3-D ICs With Integrated Microchannel Cooling

A numerical investigation of conjugate heat transfer from a flush heat source on a conductive board in laminar channel flow

Modeling, Experiment, and Fabrication of Micro-Grooved Heat Pipes: An Update

Vertically integrated circuits (3-D ICs) may revitalize Moore’s law scaling which has slowed down in recent years. 3-D stacking is an emerging technology that stacks multiple dies vertically to achieve higher transistor density independent of device scaling. They provide high-density vertical interconnects, which can reduce interconnect power and delay. Moreover, 3-D ICs can integrate disparate circuit technologies into a single chip, thereby unlocking new system-on-chip architectures that do not exist in 2-D technology. While 3-D integration could bring new architectural opportunities and significant performance enhancement, new thermal, power delivery, signal integrity and reliability challenges emerge as power consumption grows, and device density increases. Moreover, the significant expansion of CPU design space in 3-D requires new architectural models and methodologies for design space exploration (DSE). New design tools and methods are required to address these 3-D-specific challenges. This keynote paper focuses on the state of the art, ongoing advances and future challenges of 3-D IC design tools and methods. The primary focus of this paper is TSV-based 3-D ICs, although we also discuss recent advances in monolithic 3-D ICs. The objective of this paper is to provide a unified perspective on the fundamental opportunities and challenges posed by 3-D ICs especially from the context of design tools and methods. We also discuss the methodology of co-design to address more complicated and interdependent design problems in 3-D IC, and conclude with a discussion of the remaining challenges and open problems that must be overcome to make 3-D IC technology commercially viable.

TSV-Based 3-D ICs: Design Methods and Tools

Analytical solutions are presented for the temperature field which arises from the application of a source of heat on an adiabatic plate or board when the fluid is represented as a uniform flow with an effective turbulent diffusivity, the so-called UFED flow model. Solutions are summarized for a point source, a one-dimensional strip source, and a rectangular source of heat. The ability to superpose the individual kernel solutions to obtain the temperature field due to multiple sources is demonstrated. The point source solution reveals that the N/sup -1/ law commonly observed for the centerline thermal wake decay for three-dimensional arrays is predicted by the point source solution for the UFED model. The thermal wake approaches the point source behavior downstream from the source, suggesting a new scaling for the far thermal wake that successfully collapses the thermal wake for several sizes of components and provides a fundamental basis for experimental observations previously made for arrays of three-dimensional components. Preliminary experimental results using a thermochromic liquid crystal thermal mapping technique are presented. >

Thermal wake models for forced air cooling of electronic components

Experiments were performed to characterize the combined conduction, convection, and radiation heat transfer from a horizontal component board in a shallow horizontal enclosure. Measurements were made in both a simulated enclosure with well controlled thermal boundary conditions and an actual electronic enclosure. Comparison was made with simulated results using a commercial three dimensional conduction code with heat transfer coefficient boundary conditions and two simple one-dimensional models which ignore z-direction conduction in the board. The one-dimensional models compared well with the three-dimensional simulations. Agreement between experimental and simulation results was excellent. The results point out the importance of thermal radiation in the enclosure. The results show that the magnitude of the heat transfer coefficient used in the predictive model does not have to be known extremely accurately to predict maximum board temperatures with good accuracy. >

J.D. Chicci

Papers

Thermal wake models for forced air cooling of electronic components

Heat transfer in a low aspect ratio horizontal enclosure for laptop computer application