Principles of optimisation, modelling and testing of intelligent cyclic A/D converters

The paper presents the results of design, implementation and adjusting of the CMOS version of the hardware prototype of new ldquointelligentrdquo cyclic analog-to-digit converter (IC ADC). There are presented the concept of intelligent conversion, main principles of practical implementation, main stages and particularities of design and adjusting the IC ADC.

Particularities of cyclic intelligent ADC design, implementation and adjusting

Principles of complex software and hardware design of the sub-optimal low-energy cyclic ADC (CADC) are presented. The extended conversion algorithm for esti- mates computing is discussed. Upper boundaries of CADC resolution, rate of conversion and the ways they can be achieved are analyzed. Properties and general advantage of sub-optimal CADC are discussed and investigated in simulation experiments.

Analytic design of cyclic low energy adc with sub-optimal estimates calculation

The paper is devoted to methods of accurate assessment of expected and real effective number of bits (ENOB) of cyclic A/D converters. There is discussed the equivalence of definition of ENOB in IEEE Standard 1241-2000 and analytical definition of ENOB used in our previous works. Generalization of ENOB definition is discussed, which enables its accurate application to analysis and testing of the cyclic and pipe-line ADCs performance. The indirect and direct methods of ENOB assessment are discussed. The results of the paper can be used for development of reliable procedures for analysis and testing of ADC performance.

Particularities of the Cyclic A/D Converters ENOB Definition and Measurement

The methods of additional improvement of the quality of sub-optimal intelligent cyclic A/D converters (IC ADC) are presented. There are proposed new approaches, based on utilisation of resources of digital part of converters (software), which extend the functional possibilities and range of IC ADC applications. The methods of definition of most appropriate parameters of the analogue part are discussed. The results of researches permit to design the converters with performance close to theoretically available.

Methods of Additional Improvement of Intelligent CADC Performance

Design and analysis of algorithmic multi-pass A/D converters with the theoretically highest resolution and rate of conversion

Mathematical and Computer Models in Multi-pass ADC Design and Optimization

The paper presents a brief survey of new results in the theory, modelling, implementation and testing of new class of high-efficient low-energy cyclic A/D converters (CADC)  intelligent cyclic ADC (IC ADC). There are discussed general principles of IC ADC functioning, analysis and design, Advantages of IC ADC over conventional CADC caused by transition to computing of the long-bit codes (estimates) of the input signal are explained. Special attention is paid to particularities and methods of modelling analysis and testing of IC ADC. Keywords : intelligent cyclic ADC, effective resolution, optimisation, performance analysis, testing. 1. INTRODUCTION Cyclic A/D converters (CADC) have minimal number of analogue elements, energy consumption, sizes and cost under sufficiently high accuracy and speed of conversion [1-3] which ensures their wide application in low-energy systems. Success in fitting these incompatible requirements depends on the entirety of utilisation of resources of CADC elements. Recently, CADC design is performed with minimal analytical support that signifi cantly weakens possib ility to solve this task most efficiently. In the paper, principles, advantages and methods of analysis of new class of "intelligent" CADC (IC ADC) are presented. Their particularity is application of new optimal signal processing algorithms [4-6] developed for adaptive estimation systems. This permits to assess the upper boundaries of resolution and speed of conversion achievable under given conditions and define the structure and parameters of th e analogue and digital parts of CADCs with characteristics close to these boundaries ([6,7] and other works). The obtained results permit to construct sub-optimal IC ADCs, which utilise entirely the resources of the analogue and digital part s and have better performance than other CADCs of similar predestination. Not less important for IC ADC design is a possibility of fast and accurate simulation analysis of their (also, of conventional CADC) performance depending on all factors influencing on the quality of conversion. For instance, on the parameters and non-linearities of the analogue elements, characteristics of the input signals and noises, structure and parameters of code forming algorithm, etc. This task is solv ed in dynamics [5-9] that is for each cycle of conversion. The paper presents bibliographical survey of the results of researches [6-32] with explanation of most important assumptions, models, methods of analysis and results. General perspectives of further development of researches are discussed.

J. Jasnos

Papers

Principles of optimisation, modelling and testing of intelligent cyclic A/D converters

Design and analysis of algorithmic multi-pass A/D converters with the theoretically highest resolution and rate of conversion

Particularities of cyclic intelligent ADC design, implementation and adjusting

Mathematical and Computer Models in Multi-pass ADC Design and Optimization

New class of highly efficient intelligent cyclic ADCs: backgrounds, methods of design, and testing