A method for forming packaged substrates, including flip-chip dice individually or in a multi-die wafer. The method includes using a stereolithographic process to form a protective dielectric polymeric sealing structure on at least the active surface of the substrate. In addition, the invention encompasses forming a similar layer on a second substrate to be joined to the first substrate. Contact pads of the second substrate are exposed through the layer thereon to facilitate joining of the two substrates. Semiconductor devices formed by the method are also disclosed.

Semiconductor devices having protective layers thereon through which contact pads are exposed and stereolithographic methods of fabricating such semiconductor devices

A method of bonding a flexible circuitized substrate to a circuitized substrate (e.g., printed circuit board) to interconnect selected circuitry of both substrates using solder. Solder paste is applied over conductive pads on the circuitized substrate and organic dewetting material (e.g., epoxy coating) adjacent thereto. The flexible substrate, having conductors located within and/or traversing an aperture in the flexible substrate's dielectric, is positioned above the solder paste and heat is applied (e.g., in an oven). The paste, dewetting from the organic material, "balls up" and substantially surrounds a solder member (ball) attached to a bridging portion of the flexible substrate's conductor, thereby connecting both substrates. A frame member may be used to align the flexible substrate, both during solder member attachment thereto, as well as for aligning the flexible substrate having solder members attached, to the respective solder paste locations on the lower substrate.

Method for bonding flexible circuit to circuitized substrate to provide electrical connection therebetween using different solders

A thin film magnetic head includes an upper shield section, a lower shield section and a magnetoresistance device section between the upper shield section and the lower shield section. The magnetoresistance device section is connected to the upper shield section and the lower shield section through conductive layers. Current flows through the magnetoresistance device section via the upper shield and the lower shield.

Thin film magnetic head

A method of forming solder bumps includes the steps of applying a thick layer of solder resist (22) to a substrate (20). The resist is selectively removed to provide wells (23) at solder pads (21) on the substrate. The solder paste (24) is applied to the substrate in the wells. The solder paste is reflowed to form solder bumps (25) on the pads. A socket for a solder bumped member (36) is obtained by first providing a substrate (30) having metallized pads corresponding to the solder bumps of the member. A thick layer of photo definable solder resist (32) is applied to the substrate. The resist is selectively removed to provide wells (33) at the metallized pads (31) of the substrate. Solder paste (34) is then deposited in the wells. The solder bumped member (36) can then be positioned so that the solder bumps (37) are located in the wells. The solder paste (34) is reflowed to bond to the solder bumps (37) and the metallized pads (31). The solder paste (34) can be selected to have a lower melting temperature than the solder bumps (37). By reflowing the solder paste (34) at a temperature lower than the melting temperature of the solder bumps (37), the paste can wet to and blend with the solder bumps while not causing the solder bumps to reflow.

Method of making high density solder bumps and a substrate socket for high density solder bumps

An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips. Solder bumps with different characteristics may be formed by varying the current-time product to each individual pad of the temporary substrate during a plating operation.

Method for testing, burn-in, and/or programming of integrated circuit chips

An improved method of forming raised input/output (I/O) terminals on the top surfaces of semiconductor elements of a semiconductor wafer. After via openings are formed through the passivation layer of such elements at locations where the I/O terminals are to be formed, which openings provide access to the metalization layers of the elements photolithographic techniques using a layer of heat resistant photoresist which is laminated to the top surface of the wafer are used to form openings through the photoresist layer to provide access to the metalization layers through the vias. A barrier metal layer is deposited on the exposed surfaces of the photoresist, and the metalization layers, and passivation layer of the elements. The barrier metal layer overlying the photoresist and then the photoresist are stripped from the wafer. The same photolithographic techniques using the same heat resistant photoresist material are used to define openings surrounding the barrier metal lining the via openings. A layer of solder is then deposited on the wafer. The solder overlying the photoresist and then the photoresist are stripped from the wafer. The solder is heated until it reflows to form raised I/O terminals of the devices which terminals each will have a substantially spherical exposed surface.

Jack A. Sartell

Papers

Method of forming solder bump terminals on semiconductor elements

Magnetostrictive material and elements