James A. Gasbarro

TL;DR: In this article, the electrical current source circuitry for a bus is described, which includes transistor circuitry coupled between the bus and ground for controlling bus current, control circuitry coupled to the transistor circuitry, and a controller coupled with the control circuitry for controlling transistor circuitry.

TL;DR: In this article, a bus system that minimizes clock-data skew is described, which consists of a data bus, a clockline and synchronization circuitry, where the clockline ensures that clock and data signals travel in the same direction.

TL;DR: In this article, a gesture-based power management for a wearable portable electronic device with display is described, where an inertial sensor is calibrated to a reference orientation relative to gravity, and the display is enabled when the device is within a viewable range.

TL;DR: In this article, a power control circuit to minimize power consumption of CMOS circuits by disabling/enabling the clock input to the CMOS circuit is presented, where the clock signal is provided to the component when it is desirable to power on the circuit.

TL;DR: In this paper, the authors propose a delay circuit to establish a write delay during a memory core write transaction such that the memory core read transaction has a processing time that is substantially equivalent to a read transaction, corresponding to the time required for signals to travel on the interconnect.