J
James C. Abel
Researcher at Intel
Publications - 14
Citations - 311
James C. Abel is an academic researcher from Intel. The author has contributed to research in topics: SIMD & Rounding. The author has an hindex of 6, co-authored 14 publications receiving 311 citations.
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Patent
Apparatus and method for vector compute and accumulate
Ould Ahmed Vall Elmoustapha,Martin G. Dixon,Kshitij A. Doshi,James C. Abel,Maxim Loktyukhin,Chad D. Hancock,Michael A. Julier,Navin Vemuri +7 more
TL;DR: In this paper, an apparatus and method for comparing elements between two immediate values is described, which includes the following operations: reading values of a first set of elements stored in a first immediate value, each element having a defined element position in the first instantiation, comparing each element from the first set with each of a second set of items stored in the second immediate value; counting the number of times the value of each element of the first sets of elements is found in a second instantiation; and transferring the final count for each element to a third immediate value.
Patent
SIMD integer multiply high with round and shift
TL;DR: In this paper, a packed multiply high with round and shift operation is presented, where a first operand has a first set of data elements and a second operand having a second set of L data elements is received.
Patent
Reducing peak spectral error in inverse Fast Fourier Transform using MMX™ technology
James C. Abel,Michael A. Julier +1 more
TL;DR: In this article, a method for computing a decimation-in-time Fast Fourier Transform of a sample is provided, the method including inputting first 2B-bit values representing the sample into a radix-4 first section of the decimation in time fast Fourier transform.
Patent
Sequencer address management
James C. Abel,Bryant Bigbee,Jason W. Brandt,Douglas M. Carmean,Gautham N. Chinya,Per Hammarlund,Richard A. Hankins,James P. Held,Shivnandan Kaushik,Baiju V. Patel,David K. Poulsen,Ryan Rakvic,John L. Reid,Scott D. Rodgers,Prashant Sethi,Sanjiv Shah,John Shen,Hong Wang,Xiang Zou +18 more
TL;DR: In this article, a system, methods and mechanism for management and translation of mapping between logical sequencer addresses and physical or logical sequencers in a multi-sequencer multithreading system is described.
Patent
Method and system for automatically prioritizing and analyzing performance data for one or more, system configurations
TL;DR: In this article, a system and a method of automatically prioritizing and analyzing performance data for one or more system configurations are provided, and advice associated with that insight is obtained using the second tool.