J
Jean Vuillemin
Researcher at Panasonic
Publications - 10
Citations - 299
Jean Vuillemin is an academic researcher from Panasonic. The author has contributed to research in topics: Arithmetic logic unit & Computing with Memory. The author has an hindex of 5, co-authored 10 publications receiving 299 citations.
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Patent
Reconfigurable processor devices
TL;DR: In this article, a reconfigurable device comprising a plurality of processing devices, a connection matrix providing an interconnect between the processing devices and means to define the configuration of the connection matrix is presented.
Patent
Implementation of multipliers in programmable arrays
TL;DR: In this paper, a method of multiplying a first number by a second number by use of an array of processing devices, each of said processing devices having a plurality of data inputs, data outputs, and an instruction input for control of the function of the processing device, where each processing device calculates a partial product for multiplication of the first number with one or more bits of the second number.
Patent
Field programmable processor arrays
TL;DR: In this paper, an integrated circuit has a field programmable circuit region arranged as a generally rectangular array of rows and columns of circuit areas, where the processing units and the switching sections are arranged alternately in each row and in each column.
Patent
Field programmable processor devices
TL;DR: In this article, a field programmable device comprising an array of processing devices, a connection matrix interconnecting the processing devices and including switches, and memory cells for storing data for controlling the switches to define the configuration of the interconnections of the connection matrix.
Patent
Configurable processing device and method of using said device to construct a central processing unit
TL;DR: In this article, a reconfigurable device comprising a plurality of processing devices, a connection matrix providing an interconnect between the processing devices and means to define the configuration of the connection matrix is presented.