Frequency synthesizer has been developed to support various communication systems in recent wireless communication systems. Consequently, the design of frequency synthesizer which is suitable for high performance communication system is essential, and frequentcy synthesizer must maintain low phase noise. The design of VCO and fractional divider is important in frequency synthesizer which is based on PLL. Specially, sigma-delta modulator is one of important design blocks when fractional frequency synthesizer is integrated in low noise system. But, the design methodology which is accurate for sigma-delta modulator in fractional frequency synthesizer is not shown in most designs. Also, the needs of reconfigurable sigma-delta modulator for low noise characteristics supporting other frequencies is increasing nowadays. In this paper, the 3rd-order reconfigurable serial single stage sigma-delta modulator using a new design methodology is proposed and verified.

Jecheol Moon

Papers

A New Design Methodology for Reconfigurable Sigma-Delta Modulator for Fractional Frequency Synthesizer