The disclosure discloses abrasion resistant, persistently hydrophobic and oleophobic, anti-reflective and anti-soiling coatings for glass. The coatings described herein have wide application, including for example the front cover glass of solar modules. Methods of applying the coatings using various apparatus are disclosed. Methods for using the coatings in solar energy generation plants to achieve greater energy yield and reduced operations costs are disclosed. Coating materials are formed by combinations of hydrolyzed silane-base precursors through sol-gel processes. Several methods of synthesis and formulation of coating materials are disclosed.

Anti-reflective and anti-soiling coatings with self-cleaning properties

Disclosed herein are polysilsesquioxane-based anti-reflective coating (ARC) compositions, methods of preparation, and methods of deposition on a substrate. In one embodiment, the polysilsesquioxane of this disclosure is prepared in a two-step process of acid catalyzed hydrolysis of organoalkoxysilane followed by addition of tetralkoxysilane that generates silicone polymers with >40 mol % silanol based on Si-NMR. These high silanol siloxane polymers are stable and have a long shelf-life in polar organic solvents at room temperature. Also disclosed are low refractive index ARC made from these compositions with and without additives such as porogens, templates, thermal radical initiator, photo radical initiators, crosslinkers, Si—OH condensation catalyst and nano-fillers. Also disclosed are methods and apparatus for applying coatings to flat substrates including substrate pre-treatment processes, coating processes and coating curing processes including skin-curing using hot-air knives. Also disclosed are coating compositions and formulations for highly tunable, durable, highly abrasion-resistant functionalized anti-reflective coatings.

High gain durable anti-reflective coating

Glass coating materials and methods are disclosed for the coating of glass substrates used in the manufacturer of photovoltaic solar modules such that the coating enhances the reliability of the module by reducing its susceptibility to potential induced degradation (PID). Coating materials are disclosed that reduce soiling on the front surface of the glass; that increase the surface resistivity of the glass and that repel moisture and that seal the surface from the ingress of moisture. Further electrically conductive coatings are disclosed that reduce the electric field between the front and back surfaces of the glass and hence reduce ion mobility within the glass and transport from the interior glass surface to the solar cell. There are additional configuration choices for fine tuning associated with separately optimizing the exterior and interior glass coating. Finally, coating processes and methods are disclosed for coating glass substrates with the disclosed materials.

Coating materials and methods for enhanced reliability

Disclosed herein are coating materials and methods for applying a top-layer coating that is durable, abrasion resistant, highly transparent, hydrophobic, low-friction, moisture-sealing, anti-soiling, and self-cleaning to an existing conventional high temperature anti-reflective coating. The top coat imparts superior durability performance and new properties to the under-laying conventional high temperature anti-reflective coating without reducing the anti-reflectiveness of the coating. Methods and data for optimizing the relative thickness of the under-layer high temperature anti-reflective coating and the top-layer thickness for optimizing optical performance are also disclosed.

Multi-layer coatings

The invention discloses an on-chip power source noise peak value measurement system suitable for an integrated circuit chip and a measurement method. According to the power source noise peak value measurement system, digital signatures can be generated through resistor voltage division, inverter amplification and trigger sampling, so that power source noise peak values at various regions on a power source network on the integrated circuit chip can be measured in real time; and an adaptive control module is used in cooperation, so that adjustment processing can be performed on the measured peak values, and therefore, influence of power source noises on the performance of the integrated circuit chip can be decreased. The power source noise peak value measurement system of the invention has the advantages of high measuring accuracy and little influence on the chip. The power source noise peak value measurement system can be independently used for monitoring or testing the chip so as to reduce the interference of the power source noises to the chip.

On-chip power source noise peak value measurement system suitable for integrated circuit chip and measurement method of measurement system

PROBLEM TO BE SOLVED: To reduce magnetic wave interferences, while maintaining increase in the scale and in speed of LSI. SOLUTION: A method for analyzing noise from the outside to a semiconductor integrated circuit comprises a process of extracting the impedance information of a power source wiring inside the semiconductor integrated circuit, as well as outside the semiconductor integrated circuit device; an equivalent circuit making process for making an equivalent circuit from the impedance information; and an analyzing process for supplying noise waveform from the outside as input information to the equivalent circuit and analyzes the effects of noise on the semiconductor integrated circuit. COPYRIGHT: (C)2006,JPO&NCIPI

Method and device for analyzing electromagnetic wave interference, and method for manufacturing semiconductor device using them

PROBLEM TO BE SOLVED: To facilitate efficient countermeasures by specifying an EMI generation part for an analysis-processed LSI. SOLUTION: This LSI design supporting method comprises: an unnecessary radiation analyzing process for analyzing the unnecessary radiation quantity of an LSI by the execution of simulation; a process for selecting an instance whose noise quantity is large in the unnecessary radiation analyzing process; and a process for adjusting the driving capability of an instance to drop to such extent that any delay is not generated in the signal timing of the selected instance. At the time of optimizing the analyzed unnecessary radiation, the part whose optimization is necessary is extracted, and measures to the necessary part is taken only by the necessary quantity by, for example, taking measures to increase the creation area of a decoupling capacitance. Also, the aspect ratio of the block is changed, the block position is changed, and a cell line is changed, so that the decoupling capacitance can be easily created at the most effective insertion position. COPYRIGHT: (C)2005,JPO&NCIPI

Design supporting method for lsi

PROBLEM TO BE SOLVED: To provide a method for designing a semiconductor integrated circuit to reduce power source noise by taking the frequency characteristic of the power source noise into consideration. SOLUTION: The impedance of power wiring is calculated on the basis of the design data of the semiconductor integrated circuit and the frequency characteristic of the impedance calculated is determined. Based on the frequency characteristic determined, the design of the semiconductor integrated circuit is changed. The impedance between power sources of different potentials, as between a power supply and ground, may be calculated. Alternatively, the impedance between power sources of approximately the same potential, as between a power supply and an N-well power supply, may also be calculated. When the design is changed, a wiring method, the kind of package, the characteristic of an inductance element, a base structure, wiring intervals, decoupling capacity, wiring length, the characteristic of a resistance element and the like are changed. COPYRIGHT: (C)2005,JPO&NCIPI

Method for designing semiconductor integrated circuit with reduced power source noise

PROBLEM TO BE SOLVED: To provide specification of an EMI generating part to an LSI subjected to an analyzing process and to provide an effective countermeasure SOLUTION: The unnecessary radiation optimizing method and unnecessary radiation analyzing method are characterized by that they include an unnecessary radiation analyzing process of analyzing unnecessary radiation of the LSI by an execution of a simulation, a process of selecting an instance with high noise quantity in the unnecessary radiation analyzing process, and a process of reducibly adjusting a driving ability of the selected instance to a degree not causing a delay in a signal timing of the instance When optimizing the analyzed unnecessary radiation, a part needing optimization is extracted and a countermeasure such as increasing a generating area of decoupling capacity is provided to provide a countermeasure of only a necessary amount in the necessary part The decoupling capacity is easily generated in a most effective insertion position by exchanging an aspect ratio of a block, changing a position of the block or changing a cell line COPYRIGHT: (C)2002,JPO

Unnecessary radiation optimizing method and unnecessary radiation analyzing method

PROBLEM TO BE SOLVED: To shorten time required for analyzing electrostatic noise tolerance and optimizing design in a semiconductor integrated circuit device having an increased number of terminals due to improvement of integration. SOLUTION: The method for analyzing electrostatic noise tolerance of the semiconductor integrated circuit device largely shortens the analysis time compared with conventional ones; as the semiconductor integrated circuit device can be divided into regions, and a location with a relatively weaker tolerance to electrostatic noise can be detected from impedance information acquired in each region. As a result, the time required for optimizing the design of the device is also shortened. COPYRIGHT: (C)2007,JPO&INPIT

Method of analyzing electrostatic noise tolerance of semiconductor integrated circuit device, and method of optimizing design of the semiconductor integrated circuit device using the same

健二島崎

Papers

Method and device for analyzing electromagnetic wave interference, and method for manufacturing semiconductor device using them

Design supporting method for lsi

Method for designing semiconductor integrated circuit with reduced power source noise

Unnecessary radiation optimizing method and unnecessary radiation analyzing method

Method of analyzing electrostatic noise tolerance of semiconductor integrated circuit device, and method of optimizing design of the semiconductor integrated circuit device using the same

健二 島崎

Papers

Method and device for analyzing electromagnetic wave interference, and method for manufacturing semiconductor device using them

Design supporting method for lsi

Method for designing semiconductor integrated circuit with reduced power source noise

Unnecessary radiation optimizing method and unnecessary radiation analyzing method

Method of analyzing electrostatic noise tolerance of semiconductor integrated circuit device, and method of optimizing design of the semiconductor integrated circuit device using the same

健二島崎