A process for forming individual dies (5) having faces that allow the dies to be assembled against other like dies to form one and/or two dimensional scanning arrays wherein the active side of a wafer is etched to form small V-shaped grooves (34) defining the die faces, relatively wide grooves (40) are cut in the inactive side of the wafer opposite each V-shaped groove, and the wafer cut by sawing along the V-shaped grooves, the saw being located so that the side (62) of the saw blade (80) facing the die is aligned with the bottom of the V-shaped groove so that there is retained intact one side (35) of the V-shaped groove to intercept and prevent cracks and chipping caused by sawing from damaging the die active surface and any circuits thereon.

Method of fabricating image sensor dies for use in assembling arrays

A method of dicing a semiconductor wafer in which a physical discontinuity is formed on the surface of the wafer on both sides of a dicing line to limit the spreading of cracks and chips generated during dicing. Thereafter, the semiconductor wafer is diced to separate the pellets.

Method of dicing a semiconductor wafer

Described herein are embodiments of a bipolar junction transistor including a plurality of base terminal rings having an emitter terminal ring between any two base terminal rings of the plurality of base terminal rings, and a collector terminal ring surrounding the plurality of base terminal rings and the emitter terminal ring and methods of manufacturing the same.

Symmetric bipolar junction transistor design for deep sub-micron fabrication processes

A microwave integrated circuit having planar and mesa components and microstrip lines. To preserve a constant impedance for the microstrip lines, the mesa component is buried in a recess, which is then filled with a dielectric having substantially the same thermal expansion coefficient and the same dielectric constant as the insulating substrate. The surface of the mesa component and of the dielectric is in the plane of the planar part of the integrated circuit. Between the interconnecting microstrip lines on the planar face and the ground plane on the face of the substrate, the thickness and the dielectric constant of the material is constant.

Blanar-type microwave integrated circuit with at least one mesa component, method of fabrication thereof

A method for minimizing the damage caused by handling individual thin film elements. The method disclosed teaches formation of rows of completed sliders defined by one of two methods: wafer processing or row processing to form partial cuts between device elements. The resulting partial cuts preserve the row structure after fabrication, e.g., for inspection and packing, but allow easy separation of the completed sliders just prior to assembly.

Method for forming rows of partially separated thin film elements

The present invention is directed to a process for producing a glass passivated semiconductor device and to the device so produced. The process comprises forming at least one region having a second type of conductivity in a large area body of semiconductor material having a first type of conductivity, forming grooves (40, 42) through top and bottom surfaces (12, 14) of the large area body whereby a plurality of smaller area bodies are defined. The grooves (40, 42) are filled with a glass paste which is solidified in situ and the smaller bodies are cut from the larger body with a laser scribe. Each smaller body cut from the larger body includes the glass filled groove which defined it originally. Electrodes are then affixed to each of the smaller bodies thereby providing a semiconductor device.

Glass passivated high power semiconductor devices

A plurality of discrete transistor devices are produced on a semiconductor wafer and isolated from one another by moat etching. A passivation layer is then deposited in the moats separating the discrete transistor devices. The semiconductor wafer is then scribed and broken along lines delineated by the moats. The disclosed method permits testing of each discrete transistor device prior to separation from the wafer.

Method of making a transistor device

A bipolar transistor is provided with both high voltage and high frequency capabilities. A semiconductor body of a resistivity between 10 and 100 ohm-cm forms the collector region of the transistor and has an epitaxial semiconductor layer grown on a major surface thereof of a resistivity between about 0.5 and 10 ohm-cm and of a thickness between about 20 and 100 microns and of a conductivity type opposite from the body. At least one emitter region and integral emitter electrode are alloyed into the epitaxial layer preferably in annular rings. A base region is formed in the epitaxial layer between the emitter and semiconductor body and around the emitter region, said base region having a minimum thickness between the emitter region and the semiconductor body in the interior of the body of less than 20 and preferably between 5 and 10 microns. Base electrodes are alloyed into the epitaxial layer preferably spaced from the emitter region and emitter electrode preferably in concentric annular rings and a center circular member.

High power, high frequency bipolar transistor with alloyed gold electrodes

A method for fabricating microwave power transistor elements onto a semiconductor body. An oxidizable barrier material is applied onto the wafer that both acts as a barrier to prevent diffusion between the contact metal of the transistor and the silicon and also acts as a ballast resistor. A contact metal layer is then deposited onto the barrier material at selected locations and the excess barrier material is removed. Barrier material is left between the contact metal and the silicon and at the selected ballast resistor locations. The ballast resistors may then be trimmed, increasing the value of the resistors, by oxidizing a thin surface layer of the exposed barrier material at the ballast resistor locations.

Method of making and trimming ballast resistors and barrier metal in microwave power transistors

A glass disc-shaped thyristor is disclosed. The thyristor comprises a body of semiconductive material having a first emitter region, a first base region, a second base region and a second emitter region therein. A cathode electrode and a gate electrode are affixed to one major surface, and an anode electrode is affixed to the second major surface of the body of semiconductor material. The cathode electrode is disc-shaped and is concentrically positioned with respect to the annular-shaped gate electrode. A ring-shaped glass member is affixed to a first major surface of the body of semiconductive material and to the edges of the cathode and base electrodes to form a seal protecting a PN junction at the interface of the first emitter and base regions. An anode electrode is affixed to the second major surface of the body of semiconductive material. A second annular shaped glass member is affixed to the edge of the body of semiconductive material to form a seal protecting PN junctions formed at the interface of the first and second base regions and at the interface of the second base region with the second emitter region. The first and second ring-shaped glass members are formed by fusing glass preforms in an atmosphere comprising a predetermined mixture of nitrogen and water vapor to cause the glass preforms to soften and fuse to the surfaces of the body of semiconductive material to form a protective seals.

John A. Ostop

Papers

Glass passivated high power semiconductor devices

Method of making a transistor device

High power, high frequency bipolar transistor with alloyed gold electrodes

Method of making and trimming ballast resistors and barrier metal in microwave power transistors

Glass-sealed power thyristor