An interconnect structure comprising an interconnection formed between a bond pad and the end of a lead. The layer includes nickel, copper, cobalt, palladium, platinum, silver or gold and is electrically conductive. Also, an apparatus for forming an interconnection by a metal plating process and a device having a lead, a substrate, and a bath containing an aqueous metal plating solution which permits formation of the interconnect structure. A method of forming an interconnect structure including the step of placing a lead adjacent to a bond pad and placing the two in an electroless plating solution so that the interconnect structure may be formed.

Method for bonding a lead to a die pad using an electroless plating solution

A composite bump structure and methods of forming the composite bump structure. The composite bump structure comprises a polymer body of relatively low Young's Modulus compared to metals covered by a conductive metal coating formed at the input/output pads of an integrated circuit element or substrate. The composite bump is formed using material deposition, lithography, and etching techniques. A layer of soldering metal can be formed on the composite bumps if this is desired for subsequent processing. A base metal pad covering the integrated circuit element input/output pad can be used to provide added flexibility in location of the composite bump. The composite bump can be formed directly on the input/output pad or on the base metal pad.

Composite bump structure and methods of fabrication

A method for for processing semiconductor chips which deters the formation of "tin whiskers" and which removes excess substrate material from the passive side of a semiconductor device is presented. The deterrence of tin whiskers is accomplished by controlling the size of the bead of flowable metal on the conductive bump. The removal of excess material from the passive side of the semiconductor device is accomplished by chemical reaction after the formation of the conductive bump.

Post fabrication processing of semiconductor chips

A pad electrode is formed on a main surface of a semiconductor chip. A passivation film, which covers a surface portion of the pad electrode, is formed on the main surface of the semiconductor chip. An internal connection conductor is formed on a surface portion of the pad electrode. The semiconductor chip is covered with a molding resin which exposes only a top surface of the internal connection conductor. An external connection conductor is formed on a top surface of the internal connection conductor. The external connection conductor has a substantially flat top surface. Thereby, a plastic molded semiconductor package can be easily mounted on a printed board, and can have improved reliability after being joined on the printed board.

Plastic molded semiconductor package and method of manufacturing the same

Methods of forming an electronic structure may include forming a seed layer on an electronic substrate, and forming a conductive shunt layer on portions of the seed layer wherein portions of the seed layer are free of the conductive shunt layer. A conductive barrier layer may be formed on the conductive shunt layer opposite the seed layer wherein the conductive shunt layer comprises a first material and wherein the barrier layer comprises a second material different than the first material. Moreover, a solder layer may be formed on the barrier layer opposite the conductive shunt layer wherein the solder layer comprises a third material different than the first and second materials. Related structures are also discussed.

Methods of forming electronic structures including conductive shunt layers and related structures

A silicon wafer containing 100 to 300 microcircuits is coated with a patterned layer of glass and then a conducting layer of chromium and copper which connects, through openings in the glass, to circuit terminals and also to the silicon substrate at the scribe positions. A patterned photoresist then exposes only the terminal areas. An electroplating connection to the silicon substrate provides uniform, low-resistance current paths through the metallization at the scribe positions to the plating sites over the terminal positions for the electrodeposition of soldier.

John F Hinchey

Papers

Electroplating solder-bump connectors on microcircuits