Showing papers by "Juergen Becker published in 2003"

Power estimation and power measurement of Xilinx Virtex FPGAs: trade-offs and limitations

Abstract: The power consumption of reconfigurable systems has become a fundamental aspect in designing applications. Especially for mobile systems with a limited power supply, it is necessary to identify and optimize the power loss. Moreover, it is essential to evaluate during application development time exact power trade-offs, especially including the consideration of the dynamic reconfiguration phases of corresponding devices, e.g. the Virtex-series from Xilinx. This paper discusses the exact power consumption trade-offs between the measured runtime consumption of a mapped application and the measured reconfiguration-time consumption of different dynamically (partially and completely) reconfigured applications. Moreover, the possibilities and limitations of today's available power estimation tools are discussed and compared to the exact measurements.

Efficient processor instruction set extension by asynchronous reconfigurable datapath integration

Abstract: Nowadays, the datapaths of modern microprocessors reach their limits by using static instruction sets. A way out of this limitations is a dynamic reconfigurable processor datapath extension achieved by integrating traditional static datapaths with the coarse-grain dynamic reconfigurable XPP-architecture (extreme processing platform). Therefore, a loosely asynchronous coupling mechanism of the corresponding datapath units has been developed and integrated onto a CMOS 0.13 /spl mu/m in standard cell technology from UMC. Here the SPARC compatible LEON processor is used, whereas its static pipelined instruction datapath has been extended to be configured and personalized for specific applications. This allows a various and efficient use, e.g. in streaming application domains like MPEG-4, digital filters, mobile communication modulation, etc. The chosen coupling technique allows asynchronous concurrency of the additionally configured compound instructions, which are integrated into the programming and compilation environment of the LEON processor.