scispace - formally typeset
J

Jung-Cheun Lien

Researcher at University of Southern California

Publications -  5
Citations -  62

Jung-Cheun Lien is an academic researcher from University of Southern California. The author has contributed to research in topics: Boundary scan & Graph (abstract data type). The author has an hindex of 3, co-authored 5 publications receiving 60 citations.

Papers
More filters
Proceedings ArticleDOI

A test and maintenance controller for a module containing testable chips

TL;DR: A design of a module test and maintenance controller (MMC) is presented that is able to test every chip in a module via an ETM-BUS or a boundary scan bus.
Proceedings ArticleDOI

Concurrent control of multiple BIT structures

TL;DR: A generic control graph for activating common built-in test structures is derived and its microprogrammed and hardwired implementations described, and two designs for this generic controller are presented.
Journal ArticleDOI

An optimal scheduling algorithm for testing interconnect using boundary scan

TL;DR: This article modeled using a directed graph found necessary and sufficient conditions for obtaining an optimal schedule when the graph is acyclic, and an algorithm for constructing an optimaldule for any graph.
Journal ArticleDOI

Test program synthesis for modules and chips having boundary scan

TL;DR: The focus of this article is on the automated test program synthesis techniques employed in BOLD that can greatly reduce test program development costs.

Concurrent Control of Multiple BIT

TL;DR: A generic control graph for activating common BIT structures is derived and its microprogrammed and hardwired implementations described, along with simulation results of area/test time tradeoffs.