This paper gives an overview of medium-voltage (MV) multilevel converters with a focus on achieving minimum harmonic distortion and high efficiency at low switching frequency operation. Increasing the power rating by minimizing switching frequency while still maintaining reasonable power quality is an important requirement and a persistent challenge for the industry. Existing solutions are discussed and analyzed based on their topologies, limitations, and control techniques. As a preferred option for future research and application, an inverter configuration based on three-level building blocks to generate five-level voltage waveforms is suggested. This paper shows that such an inverter may be operated at a very low switching frequency to achieve minimum on-state and dynamic device losses for highly efficient MV drive applications while maintaining low harmonic distortion.

Medium-Voltage Multilevel Converters—State of the Art, Challenges, and Requirements in Industrial Applications

The neutral-point (NP) potential of the three-level neutral-point-clamped converters is needed to maintain balancing. Zero-sequence voltage is the only freedom degree when carrier-based pulsewidth modulation is utilized. Appropriate zero-sequence voltage should be identified to control the NP potential. The relationship between the neutral current and injected zero-sequence voltage is studied comprehensively, and two balancing algorithms of NP potential, respectively adopting searching-optimization and interpolation methods, are presented. The theoretical optimum zero-sequence voltage for controlling NP potential can be obtained by the latter proposed algorithm. Simulation and experimental results are shown to verify the validity and practicability of the proposed algorithms.

Analysis and Calculation of Zero-Sequence Voltage Considering Neutral-Point Potential Balancing in Three-Level NPC Converters

The objective of the present work is to improve the output waveform of three level inverters used in high-power applications, where the switching frequency is very low. This is achieved by maintaining the synchronization, half-wave symmetry, quarter-wave symmetry, and three-phase symmetry in the pulsewidth modulation (PWM) waveforms. The principles of achieving synchronization and symmetries in terms of space vectors for three level inverters are presented. A novel synchronized space vector pulsewidth modulation (SVPWM) algorithms is proposed and verified experimentally. The experimental waveforms of the inverter output voltage and motor no load current for different operating conditions of the drive are presented. The performance measure in terms of the weighted total harmonic distortion (THD) of the line voltage is computed for the linear modulation region of the drive for the proposed algorithm and compared with that of synchronized SVPWM and synchronized sine-triangle pulsewidth modulation (SPWM) technique. The comparative results show that consideration of synchronization and symmetry results in improved THD. Another significant feature of the proposed algorithm is that the symmetry and synchronization leads to self-balancing of the direct current (dc) bus capacitor voltages over every one third cycle of the fundamental

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Modified SVPWM Algorithm for Three Level VSI With Synchronized and Symmetrical Waveforms

A new operational mode for diode-clamped multilevel inverters termed quasi two-level operation is proposed. Such operation aims to avoid the imbalance problem of the dc-link capacitors for multilevel inverters with more than three levels and reduces the dc-link capacitance without introducing any significant voltage ripple at the dc-link nodes. The proposed operation can be generalized for any number of levels. The validity of the proposed multilevel inverter operational mode is confirmed by simulations and experiments on a prototype five-level diode-clamped inverter.

Capacitor Balance Issues of the Diode-Clamped Multilevel Inverter Operated in a Quasi Two-State Mode

This paper presents a transformerless hybrid active filter integrated into a medium-voltage motor drive for energy savings. This hybrid filter is intended for line harmonic-current mitigation of the three-phase diode rectifier used as the front end of the motor drive. It is based on direct connection of a passive filter tuned to the seventh-harmonic frequency in series with an active filter using a three-level pulsewidth modulated (PWM) converter. This paper provides a theoretical discussion on voltage-balancing control of two split dc capacitors of the active filter. The 400-V 15-kW motor drive system is designed, constructed, and tested, which can be considered as a downscaled model from a medium-voltage motor drive without regenerative braking. Experimental results verify that the hybrid filter has the capability of satisfactory harmonic filtering and stable voltage balancing in all the load conditions.

A Transformerless Hybrid Active Filter Using a Three-Level Pulsewidth Modulation (PWM) Converter for a Medium-Voltage Motor Drive

This paper proposes a new neutral point potential control technique for the three-level neutral-point-clamped PWM inverter Utilizing the phase current polarity information, this technique distributes the redundant voltage vectors in a manner to obtain stable neutral point voltage under all operating conditions including the zero power factor condition Detailed analysis and computer simulations show the superiority of the proposed method The feasibility of the proposed method has been proven via laboratory experiments

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K. Yamanaka

Papers

A novel neutral point potential stabilization technique using the information of output current polarities and voltage vector