PROBLEM TO BE SOLVED: To solve the problem, wherein it is impossible for an electronic content information provider to provide commercially secure and effective method, for a configurable general-purpose electronic commercial transaction/distribution control system. SOLUTION: In this system, having at least one protected processing environment for safely controlling at least one portion of decoding of digital information, a secure content distribution method comprises a process for encapsulating digital information in one or more digital containers; a process for encrypting at least a portion of digital information; a process for associating at least partially secure control information for managing interactions with encrypted digital information and/or digital container; a process for delivering one or more digital containers to a digital information user; and a process for using a protected processing environment, for safely controlling at least a portion of the decoding of the digital information. COPYRIGHT: (C)2006,JPO&NCIPI

https://apps.dtic.mil/dtic/tr/fulltext/u2/a423264.pdf

Systems and Methods for Secure Transaction Management and Electronic Rights Protection

An interactive television program guide with remote access is provided. The interactive television program guide is implemented on interactive television program guide equipment. A remote program guide access device is connected to the interactive television program guide equipment by a remote access link to provide a user with remote access to program guide functions. An interactive television program guide system based on multiple user television equipment devices in a single household is provided. The system provides a user with an opportunity to adjust program guide settings with a given one of the interactive television program guides. Program guide setting include features related to setting program reminders, profiles, program recording features, messaging features, favorites features, parental control features, program guide set up features (e.g., audio and video and language settings), etc.

Interactive television program guide with remote access

A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.

Flash EEprom system

Systeme unifie de communication a programmation regroupant les communications de l'art anterieur (telles que par exemple la television, la radio, l'impression transmise electroniquement, et les communications par ordinateur) ainsi que les nouveaux mass medias specifiques aux utilisateurs. Unified programming communication system involving communications of the prior art (such as eg television, radio, print transmitted electronically, and computer communications) and new mass media specific users. Dans le systeme unifie, des moyens (205) et procedes mettant en oeuvre des systemes d'ordinateurs ont la capacite de produire des informations specifiques a un utilisateur particulier, simultanement a chaque poste (26) d'une pluralite de postes d'abonnes (26). In the unified system, means (205) and methods employing computer systems have the ability to generate specific information to a particular user, simultaneously with each station (26) a plurality of subscriber stations ( 26).

Signal processing apparatus and methods.

Rights management information is used at least in part in a matching, narrowcasting, classifying and/or selecting process. A matching and classification utility system comprising a kind of Commerce Utility System is used to perform the matching, narrowcasting, classifying and/or selecting. The matching and classification utility system may match, narrowcast, classify and/or select people and/or things, non-limiting examples of which include software objects. The Matching and Classification Utility system may use any pre-existing classification schemes, including at least some rights management information and/or other qualitative and/or parameter data indicating and/or defining classes, classification systems, class hierarchies, category schemes, class assignments, category assignments, and/or class membership. The Matching and Classification Utility may also use at least some rights management information together with any artificial intelligence, expert system, statistical, computational, manual, or any other means to define new classes, class hierarchies, classification systems, category schemes, and/or assign persons, things, and/or groups of persons and/or things to at least one class.

Systems and methods for matching, selecting, narrowcasting, and/or classifying based on rights management and/or other information

A multi-processor system and method arranged, in one embodiment, as an image and graphics processor. The multiprocessor system includes several individual processors all having communication links to several memories. Additional instruction memories are dedicated individually as cache memories to particular processors so that the processors can function in the multiple instruction, multiple data (MIMD) mode. When the processors function in the single instruction, multiple data mode (SIMD) the dedicated memories are reassigned for access by all of the processors for data. A crossbar switch serves to establish the processor memory links. The entire image processor, including the individual processors, the crossbar switch and the memories, is contained on a single silicon chip.

Dual mode SIMD/MIMD processor providing reuse of MIMD instruction memories as data memories when operating in SIMD mode

There is disclosed a multiprocessor system arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the processor memory links. The entire image processor, including the individual processors, the crossbar switch and the memories are contained on a single silicon chip. Each processor can operate to execute the same instruction at the same time (SIMD mode) or different instructions at the same time (MIMD mode).

Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation

A data processing apparatus including a multiplier unit forming a product from L bits of each two data buses of N bits each N is greater than L. The multiplier forms a N bit output having a first portion which is the L most significant bits of the of product and a second portion which is M other bits not including the L least significant bits of the product, where N is the sum of M and L. In the preferred embodiment the M other bits are derived from other bits of the two input data busses, such as the M other bits of the first input data bus. An arithmetic logic unit performs parallel operations (addition, subtraction, Boolean functions) controlled by the same instructions. This arithmetic logic unit is divisible into a selected number of sections for performing identical operations on independent sections of its inputs. The multiplier unit may form dual products from separate parts of the input data. A single instruction controlling both the multiplier unit and the arithmetic logic unit permits addition of dual products. The dual products are temporarily stored in a data register permitting the multiply and add operations to be pipelined. The dual products are formed in one data word and added by a rotate/mask and add operation in a three input arithmetic unit.

Long Instruction Word Controlling Plural Independent Processor Operations

There is disclosed a multiprocessor system and method arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the processor memory links and an inter-processor communication link allows the processors to communicate with each other for the purpose of establishing operational modes. A parameter memory, accessible via the crossbar switch, is used in conjunction with the communication link for control purposes. The entire image processor, including the individual processors, the crossbar switch and the memories, is contained on a single silicon chip.

Reconfigurable SIMD/MIMD processor using switch matrix to allow access to a parameter memory by any of the plurality of processors

The multimedia video processor (MVP) architecture, which incorporates a variety of parallel processing techniques to deliver very high performance to a wide range of imaging and graphics applications, is described. The MVP combines, on a single semiconductor chip, multiple fully programmable processors with multiple data streams connected to shared RAMs through a crossbar network. Each of the independent processors can execute many operations in parallel every cycle. The architecture is scalable and supports different numbers of processors to meet the cost and performance requirements of different markets. MVP's target environment and the development of MVP are outlined. >

Karl M. Guttag

Papers

Dual mode SIMD/MIMD processor providing reuse of MIMD instruction memories as data memories when operating in SIMD mode

Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation

Long Instruction Word Controlling Plural Independent Processor Operations

Reconfigurable SIMD/MIMD processor using switch matrix to allow access to a parameter memory by any of the plurality of processors

A single-chip multiprocessor for multimedia: the MVP