The hike in the use of the high-power utilization, the want for the multilevel inverter (MLI) came into picture. The multilevel inverters are designed so as to obtain higher levels of voltage using very less numbers of resources. So, the design of a hybrid reduced switch topology for the inverter started. Further sources are modified in order to obtain a very large level of voltage with a smaller number of sources. Similar effort is made to designed hybrid inverter structures for 9-level and 11-level multi-level inverters (MLIs) with significantly reduced numbers of power electronics devices and direct current power supplies. Further the topology is controlled and connected to grid using Phase Locked Loop (PLL) to analyze the performance of the inverter with the single-phase grid. A current controller is build using Proportional-Resonant (PR) controller to achieve proper integration of the MLI with the grid. The reference waveform obtained from the controller is used to achieve the inverter gate pulse using Level Shift Pulse Width Modulation (LS-PWM) technology. The 11-level MLI is more efficiently integrated into the grid than the 9-level MLI.

Grid Integration and Performance Analysis of hybrid Multilevel Inverters

The requirement of high power and maximum efficiency in case of the AC to DC power conversion, voltage source multilevel inverters (VSMLI) proved to be efficient. Neutral/diode clamped MLI, Capacitor type and cascaded Bridge Type are some of the MLI's used in both single as well as three phase scenarios. The output of the MLI is distorted i.e., it contains harmonics in the output response. The need to obtain a pure sinusoidal AC output leads to harmonic elimination techniques. ‘Pulse Width Modulation’ (PWM) procedure is widely used harmonic elimination technique. In this paper a three phase 9-level Cascaded H-bride MLI is considered with level shift PWM scheme to drop the Total Harmonic Distortion (THD) factor in the voltage response. Integral Square Error (ISE) of the voltage waveform is evaluated and is minimized using Proportional-Integral (PI) controller. The PI controller is tuned using two meta heuristic intelligent optimization techniques. ‘Teaching Learning Based Optimization’ (TLBO) and ‘Genetic Algorithm’ (GA) are compared on the basis of precise gain values and THD percentage obtained. The GA holds good in minimizing the harmonics to a greater extent.

Meta Heuristic approach for Minimization of ISE in three phase Cascaded H-Bridge MLI

The Multilevel Inverter (MLI) comes in large range of levels and the study of MLI took an acceleration in recent time. MLI has wide range of use in moderate voltage and large power applications. For utilization, the inverter must satisfy the voltage requirement as desired by the load, so controlling the response of the inverter is a matter of concern. In this paper, intelligent algorithm-based Proportional Integral (PI) controller is implemented for nourishing the output response of the inverter. The Regulation of Inverter output voltage is done by minimizing the “Integral Time Absolute Error” (ITAE). Here ITAE is considered as the objective to be minimized using stochastic optimization techniques. Optimization techniques like, “Particle Swarm Optimization” (PSO), “Genetic Algorithm” (GA) and “Artificial Bee Colony” (ABC) are implemented and compared. A seven level H-Bridge based Cascaded Multi-level Inverter (HBC MLI) is simulated using “Level Shifted Pulse Width Modulation” (LS PWM) technique. ABC optimization technique proved to be better than the other techniques in terms of better fitness.

Kausik Nanda

Papers

Grid Integration and Performance Analysis of hybrid Multilevel Inverters

Meta Heuristic approach for Minimization of ISE in three phase Cascaded H-Bridge MLI

Intelligent control based level shifted PWM Multilevel Inverter