A non-volatile semiconductor device has a memory cell array having electrically erasable programmable non-volatile memory cells, reprogramming and retrieval circuits that temporarily store data to be programmed in the memory cell array and sense data retrieved from the memory cell array. Each reprogramming and retrieval circuit has first and second latches that are selectively connected to the memory cell array and transfer data. A controller controls the reprogramming and retrieval circuits on a data-reprogramming operation to and a data-retrieval operation from the memory cell array. Each reprogramming and retrieval circuit has a multilevel logical operation mode and a caching operation mode. In the multilevel logical operation mode, re-programming and retrieval of upper and lower bits of two-bit four-level data is performed using the first and the second latches to store the two-bit four-level data in one of the memory cells in a predetermined threshold level range. In the caching operation mode, data transfer between one of the memory cells selected in accordance with a first address and the first latch is performed while data transfer is performed between the second latch and input/output terminals in accordance with a second address with respect to one-bit two-level data to be stored in one of the memory cells.

Non-volatile semiconductor memory

An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly linear lamps for emitting light energy onto a wafer. The linear lamps can be placed in various configurations. In accordance with the present invention, tuning devices which are used to adjust the overall irradiance distribution of the light energy sources are included in the heating device. The tuning devices can be, for instance, are lamps or lasers.

System and process for heating semiconductor wafers by optimizing absorption of electromagnetic energy

The present invention is directed to perform fine low-voltage control without largely increasing the circuit layout area in a low-power consumption structure. In the case of shifting a region to a low-speed mode, a system controller outputs a request signal and an enable signal to a power switch controller and a low-power drive circuit, respectively, to turn off a power switch and to perform a control so that the voltage level of a virtual reference potential becomes about 0.2 V to about 0.3V. The region operates on voltages between a power supply voltage and a virtual reference potential, so that it is controlled in the low-speed mode.

Semiconductor Integrated Circuit Device

A semiconductor memory device comprises memory cells, a bitline connected to the memory cells, a read circuit including a precharge circuit, and a first transistor connected between the bitline and the read circuit, wherein a first voltage is applied to a gate of the first transistor when the precharge circuit precharges the bitline, and a second voltage which is different from the first voltage is applied to the gate of the first transistor when the read circuit senses a change in a voltage of the bitline.

Semiconductor memory device.

A thermal jet ink printing system is provided with an improved printhead. The printhead is formed by monolithic integration of MOS transistors switches (78, 80, 82) onto the same silicon substrate (48) containing the resistive elements. In a preferred embodiment, the transistor switches and resistive elements are formed from a single layer of polysilicon (78, 79) with the resistive element formed on a thermally grown field oxide layer (72) having a thickness ranging from about one to four µm. The integrated circuit chips are formed by MOS technology, are thermally stable and can be operated at higher voltages than known chips.

Monolithic silicon integrated circuit chip for a thermal ink jet printer

SEMICONDUCTOR DEVICE AND PROCESS FOR PRODUCING THE SAME ABSTRACT OF THE DISCLOSURE A polycrystalline silicon is used for a resistor element of a semiconductor device instead of a conventional, diffused resistor or a channel resistor, in which the channel resistance of an MOS transistor is utilized as the resistor The length of a polycrystalline silicon layer for the resistor element is predetermined by the other polycrystalline silicon layer, formed above the resistor element The structure of the semiconductor device according to the present invention is suited for a high density integrated circuit

Semiconductor device and process for producing the same

A semiconductor device having contact windows between an aluminum or aluminum-alloy wiring layer and a diffused region in a semiconductor substrate, in which the contacts are formed by using a barrier film on a refractory metal silicide between the wiring layer and the diffused region The barrier film comprising the refactory metal and silicon is beam annealed for a short period of time such as, 10 seconds or less, so that adverse effects of the barrier film can be prevented while an excellent electrical or ohmic contact between the wiring layer and the diffused layer can be obtained

Beam annealed silicide film on semiconductor substrate

PURPOSE:To obtain a short channel easily by using a self-matching method when forming a high impurity concentration region which will become a channel region under a gate electrode that forms an MOS transistor. CONSTITUTION:On a P-type silicon substrate 10, a silica film 32, a polycrystalline silicon layer 34 and a silica film 36 are vapor grown in stacks, and on them, a resist film 38 with an opening 38a in a position when a gate electrode will be formed is prepared. Next, by applying etching with a HF gas, a part of the film 36 under the film 38 alone is removed and the film 36 exposed in the opening 38a is remained although the reason for this phenomenon is not made clear. Next, by implantation with P-type impurity ions, a high impurity concentration P -type channel region 22e is implanted in the substrate 10 passing through the film 36, and layer 34 and the film 32 located in the opening 38a. Next, by removing the film 38 and etching using the film 36 as a mask, a gate electrode 16 consisting of the layer 34 and a gate oxide film 24 consisting of the film 32 are remained, and in the substrate 10 on both sides of the electrode, N -type source and drain regions 12 and 14 are diffusion formed.

Preparation of semiconductor device

The present invention is an improvement of a semiconductor memory device, preferably a PROM or a mask ROM, wherein: MOS transistors are formed in a semiconductor substrate, are arranged in rows, and are isolated from each other by a plurality of field insulation films arranged in an island pattern; the MOS transistors aligned in one of the rows have one common gate which extends over one row of field insulation films; the MOS transistors aligned in one of the rows have a common first region for forming a drain or a source parallel to the common gates; and a second region for forming another drain or source is surrounded by a pair of common gates and a pair of field insulation films so that a plurality of second regions are isolated from each other. According to the present invention, the field insulation films and the common gates are delineated to coincide with one another at the ends thereof facing the common first region using a mask film extending between a pair of common gates and covering the region between the pair of common gates and the part of the common gates not covered by the mask film.

Semiconductor memory device and process for producing the same

In a method of smoothing the edges of a window through a glass film (8) of a semiconductor device, a masking film (6, 7) is provided under the glass film (8), to prevent impurities from the glass film from penetrating into semiconductor substrate during the heating of the glass film (8) to smooth its edges. A masking film, for example, an Si 3 N 4 film (7), does not, however, inhibit the penetration of hydrogen gas and therefore still allows the device to be treated by heating under a hydrogen atmosphere to improve the properties of the device.

Kazunari Shirai

Papers

Semiconductor device and process for producing the same

Beam annealed silicide film on semiconductor substrate

Preparation of semiconductor device

Semiconductor memory device and process for producing the same

A method of making a semiconductor device