A barrier layer is deposited over a layer of passivation including in an opening to a contact pad created in the layer of passivation. A column of three layers of metal is formed overlying the barrier layer and aligned with the contact pad and having a diameter that is about equal to the surface of the contact pad. The three metal layers of the column comprise, in succession when proceeding from the layer that is in contact with the barrier layer, a layer of pillar metal, a layer of under bump metal and a layer of solder metal. The layer of pillar metal is reduced in diameter, the barrier layer is selectively removed from the surface of the layer of passivation after which reflowing of the solder metal completes the solder bump of the invention.

Low fabrication cost, fine pitch and high reliability solder bump

An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board, having a surface on which flip-chip pads and wire-bondable pads are provided The flip-chip pads define an area on the surface of the base at least partially bounded by the wire-bondable pads A first integrated circuit (IC) die is flip-chip bonded to the flip-chip pads, and a second IC die is back-side attached to the first IC die and then wire-bonded to the wire-bondable pads As a result, the flip-chip mounted first IC die is stacked with the second IC die in a simple, novel manner

Device and method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice

The current invention provides for encapsulated release structures, intermediates thereof and methods for their fabrication. The multi-layer structure has a capping layer, that preferably comprises silicon oxide and/or silicon nitride, and which is formed over an etch resistant substrate. A patterned device layer, preferably comprising silicon nitride, is embedded in a sacrificial material, preferably comprising polysilicon, and is disposed between the etch resistant substrate and the capping layer. Access trenches or holes are formed in to capping layer and the sacrificial material are selectively etched through the access trenches, such that portions of the device layer are release from sacrificial material. The etchant preferably comprises a noble gas fluoride NGF 2x (wherein Ng=Xe, Kr or Ar: and where x=1, 2 or 3). After etching that sacrificial material, the access trenches are sealed to encapsulate released portions the device layer between the etch resistant substrate and the capping layer. The current invention is particularly useful for fabricating MEMS devices, multiple cavity devices and devices with multiple release features.

Microelectronic mechanical system and methods

A method and apparatus of hermetically passivating a semiconductor device includes sealing a lid directly onto a semiconductor substrate. An active device is formed on the surface of the substrate and is surrounded by a substantially planar lid sealing region, which in turn is surrounded by bonding pads. A first layer of solderable material is formed on the lid sealing region. A lid is provided which has a second layer of solderable material in a configuration corresponding to the first layer. A solder is provided between the first layer and second layer of solderable materials. In the preferred embodiment, the solder is formed over the second layer. Heat is provided to hermetically join the lid to the semiconductor device without requiring a conventional package. Preferably the first and second layers are sandwiches of conventionally known solderable materials which can be processed using conventional semiconductor techniques. An angle between the lid and the semiconductor device can be controlled by adjusting relative widths of one or both the layers of solderable materials.

Method of and apparatus for sealing an hermetic lid to a semiconductor die

A semiconductor chip assembly includes a semiconductor chip attached to a support circuit. The support circuit includes an insulative base, a conductive trace and a through-hole between its top and bottom surfaces. The through-hole includes a top sidewall portion adjacent to the top surface and a bottom sidewall portion adjacent to the bottom surface. The conductive trace includes a pillar at the top surface and a routing line at the bottom sidewall portion. An electrolessly plated contact terminal on the pillar extends above the base, and an electrolessly plated connection joint in the through-hole connects the routing line and the pad. Preferably, the connection joint is the only metal in the through-hole. A method of manufacturing the assembly includes simultaneously electrolessly plating the contact terminal and the connection joint.

Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint

A bump structure has a bump constituted by a metal projection which is formed on an electrode of a substrate, and a solder which covers the metal projection but does not touch the electrode The metal projection is substantially spherical and has a projected portion at a center portion on an upper surface thereof The metal projection is made of a metal having properties of solder diffusion prevention and adhesion to solder The bump structure may have two bumps, the first bump being substantially the same as the bump described above and the second being such that its diameter is smaller than an outer diameter of the first bump and it covers the projected portion on the first bump This bump structure can be formed using a simple process, and can be applied to flip-chip mounting in semiconductor devices with high reliability and yield

Apparatus for forming a double-bump structure used for flip-chip mounting

A bump structure has a bump constituted by a metal projection which is formed on an electrode of a substrate, and a solder which covers the metal projection but does not touch the electrode. The metal projection is substantially spherical and has a projected portion at a center portion on an upper surface thereof. The metal projection is made of a metal having properties of solder diffusion prevention and adhesion to solder. The bump structure may have two bumps, the first bump being substantially the same as the bump described above and the second being such that its diameter is smaller than an outer diameter of the first bump and it covers the projected portion on the first bump. This bump structure can be formed using a simple process, and can be applied to flip-chip mounting in semiconductor devices with high reliability and yield.

Kei Tanaka

Papers

Apparatus for forming a double-bump structure used for flip-chip mounting

Method and apparatus for forming bump structure used for flip-chip mounting, the bump structure and the flip-chip