A transistor having a gate electrode, a source electrode, a drain electrode, a dielectric material and a channel region disposed between the source electrode and drain electrode. The channel region includes a portion doped with an impurity to change the fixed charge density within the portion relative to a remainder of the channel region.

Transistor including a deposited channel region having a doped portion

Embodiments of the present invention relate to an apparatus and method of plasma assisted deposition by generation of a plasma adjacent a processing region. One embodiment of the apparatus comprises a substrate processing chamber including a top shower plate, a power source coupled to the top shower plate, a bottom shower plate, and an insulator disposed between the top shower plate and the bottom shower plate. In one aspect, the power source is adapted to selectively provide power to the top shower plate to generate a plasma from the gases between the top shower plate and the bottom shower plate. In another embodiment, a power source is coupled to the top shower plate and the bottom shower plate to generate a plasma between the bottom shower plate and the substrate support. One embodiment of the method comprises performing in a single chamber one or more of the processes including, but not limited to, cyclical layer deposition, combined cyclical layer deposition and plasma-enhanced chemical vapor deposition; plasma-enhanced chemical vapor deposition; and/or chemical vapor deposition.

Apparatus and method for plasma assisted deposition

An apparatus and method for performing a cyclical layer deposition process, such as atomic layer deposition is provided. In one aspect, the apparatus includes a substrate support having a substrate receiving surface, and a chamber lid comprising a tapered passageway extending from a central portion of the chamber lid and a bottom surface extending from the passageway to a peripheral portion of the chamber lid, the bottom surface shaped and sized to substantially cover the substrate receiving surface. The apparatus also includes one or more valves coupled to the gradually expanding channel, and one or more gas sources coupled to each valve.

Gas delivery apparatus for atomic layer deposition

A method of forming a boride layer for integrated circuit fabrication is disclosed. In one embodiment, the boride layer is formed by chemisorbing monolayers of a boron-containing compound and one refractory metal compound onto a substrate. In an alternate embodiment, the boride layer has a composite structure. The composite boride layer structure comprises two or more refractory metals. The composite boride layer is formed by sequentially chemisorbing monolayers of a boron compound and two or more refractory metal compounds on a substrate.

Formation of boride barrier layers using chemisorption techniques

One embodiment of the gas delivery assembly comprises a covering member having an expanding channel at a central portion of the covering member and having a bottom surface extending from the expanding channel to a peripheral portion of the covering member. One or more gas conduits are coupled to the expanding channel in which the one or more gas conduits are positioned at an angle from a center of the expanding channel. One embodiment of a chamber comprises a substrate support having a substrate receiving surface. The chamber further includes a chamber lid having a passageway at a central portion of the chamber lid and a tapered bottom surface extending from the passageway to a peripheral portion of the chamber lid. The bottom surface of the chamber lid is shaped and sized to substantially cover the substrate receiving surface. One or more valves are coupled to the passageway, and one or more gas sources are coupled to each valve. In one aspect, the bottom surface of the chamber lid may be tapered. In another aspect, a reaction zone defined between the chamber lid and the substrate receiving surface may comprise a small volume. In still another aspect, the passageway may comprise a tapered expanding channel extending from the central portion of the chamber lid. Another embodiment of the chamber comprises a substrate support having a substrate receiving surface. The chamber further comprises a chamber lid having an expanding channel extending from a central portion of the chamber lid and having a tapered bottom surface extending from the expanding channel to a peripheral portion of the chamber lid. One or more gas conduits are disposed around an upper portion of the expanding channel in which the one or more gas conduits are disposed at an angle from a center of the expanding channel. A choke is disposed on the chamber lid adjacent a perimeter of the tapered bottom surface.

Gas delivery apparatus and method for atomic layer deposition

A method of manufacturing a MOS field effect transistor comprises forming on a semiconductor substrate a first epitaxial growth layer having an impurity doping concentration lower than that of the semiconductor substrate, forming on the first epitaxial growth layer a second epitaxial growth layer having an impurity concentration higher than that of the first epitaxial growth layer and having a thickness equal to or less than a diffusion depth of a source and a drain region, and forming on the second eptiaxial growth layer a third epitaxial growth layer having an impurity concentration lower than that of the second epitaxial growth layer and having a thickness equal to or less than that of a depletion layer at a channel region.

MOS field effect transistor and its manufacturing method

A MOS field effect transistor comprising a semiconductor substrate (1) and an epitaxial growth layer (2) provided on the substrate, the impurity concentration of the epitaxial growth layer being lower than that of the substrate, and the thickness of the epitaxial growth layer being the same as or less than the thickness of a depletion region as a channel region. The invention also provides methods of making such transistors.

Kenji Aoki

Papers

MOS field effect transistor and its manufacturing method

MOS field effect transistor and method of manufacturing the same

MOS-Feldeffekttransistor und dessen Herstellungsmethode

Transistor à effet de champ MOS et procédé pour sa fabrication