A method of forming a complementary bipolar transistor device includes the steps of: providing a substrate of semiconductor material including at least two electrically isolated N-type device regions having a generally planar common surface; forming a P-type buried subcollar region in a first of the device regions; forming an N-type buried subcollector region in a second of the device regions; forming an N-type base region in the common surface of the first device region; forming a layer of P-doped polysilicon over the base region in the first device region and over the second device region; patterning the layer of P-doped polysilicon to form an emitter contact generally centered on the base region of the first device region and a generally annular base contact on the second device region; forming a layer of insulating material over the patterned layer of P-doped polysilicon; forming a layer of N-doped polysilicon generally conformally over the device; patterning the layer of N-doped polysilicon to form a base contact generally surrounding the emitter contact on the first device region and an emitter contact generally surrounded by the base contact on the second device region; and heating the device at least once to drive impurities from the base and emitter contacts on the first and second device regions into the device regions whereby to form a vertical PNP transistor in the first device region and a vertical NPN transistor in the second device region.

Method for forming a complementary bipolar transistor structure including a self-aligned vertical PNP transistor

A triple diffused interdigitated NPN transistor formed in an isolated N-epitaxial pocket of an otherwise standard NPN bipolar junction isolated integrated circuit. The N-type diffused collector pocket in the N-epitaxial layer lowers collector resistance of the triple diffused NPN device.

Bipolar transistor structure having low saturation resistance

This invention discloses a structure of a transistor suitable for high frequency and high output power. An emitter region having a first conductivity type is formed in a base region having opposite conductivity type in contact with a collector region having the first conductivity type. Said emitter region is divided into a plurality of active emitter regions by a plurality of isolation regions having said opposite conductivity type which are formed in said emitter region and said active emitter regions are connected in parallel by an electrode such as for lead-out. The isolation regions may be used as stabilizing resistors and connected between each said active emitter region and the electrode.

Transistor with plural parallel units

Semiconductor element, including at least one bi-polar power transistor having parallel-connected transistor regions, active and contacted partial base zone regions, an emitter zone-base zone pn-junction, and base barrier resistances disposed between the active base regions at the emitter-base pn-junction and the contacted base regions, the greater part of the base current being conducted through the base barrier resistances and the voltage drop over the emitter region being small compared to the voltage between the active base region and the contacted base region.

Semiconductor element and method for producing the same

A majority charge carrier semiconductor structure including a relatively heavily doped n type support layer, a second n type layer formed on the support layer and having a relatively light doping, a p layer formed on the second n layer, and a third n type layer having a relatively heavy doping formed atop the p layer. When voltage means is applied between top and support layers principal current flow is by majority charge carriers in either direction determined by the polarity of a pre-determined voltage. Current flow occurs substantially below the critical electric field, and free of avalanche multiplication or tunneling. In alternate embodiments the doping impurity concentration may be varied to alternately provide a device wherein the magnitude of voltage reference which determines current flow in one direction or in the opposite direction may be symmetrical, asymmetrical or highly asymmetrical.

Majority carriers-variable threshold rectifier and/or voltage reference semiconductor structure

A low saturation resistance, very low offset voltage, monolithic, analog switch is provided which has high impedance in the off state; this switch being produced by fabricating a transistor on a chip. The transistor is adapted to have its base collector junction forward biased and its emitter base junction reverse biased. The parasitic action of a further transistor including the base and the collector of the inversely biased transistor and the substrate on which the inversely biased transistor is deposited, is eliminated. The inverse beta of the transistor switch is increased, and also the distributed current crowding effects in the so provided transistor is minimized.

Kenneth Paul Drozdowicz

Papers

Low saturation resistance,low offset voltage,monolithic analog switch