This paper innovatively proposes a Doughnut-shaped Karnaugh Map spatial structure, which can intuitively show the principle of adjacency between the minimum items in combinational logic circuit. Firstly, we analyze the difficulties in the process of combinational logic circuit design, and analyze the Karnaugh map method used in logic function simplification. Then, we analyze the steps of Karnaugh map reduction in detail, and define and analyze the concepts of minimum term and Karnaugh circle. Then, we propose this kind of donut Karnaugh map structure, which can clearly show the adjacency of the edge of planar Karnaugh map. Finally, we verify the important role of this method in the process of circuit design through the design experiment of combined logic circuit of referee voting device.

Design and Realization of the Doughnut-shaped Karnaugh Map Spatial Structure

In this paper we propose a robust technique to minimize multiple input digital circuits. This technique is simple and efficient to determine the minimum number of gates required to realize a multiple input digital circuit. Rather than using sizeable truth table for multiple input combinational circuits having at least one operation per minterms, proposed technique produced a minimal solution by breaking the minterms and arranging them in adjacent groups. This technique also overcomes the problems related to simplification using Karnaugh Map for more than four inputs system. Also we have proposed an algorithm to implement this technique in Java programming language and out provide results.

https://ijoaemorg.files.wordpress.com/2017/07/020600342.pdf

Koustuvmoni Bharadwaj

Papers

Software Implementation of Break-Up Algorithm for Logic Minimization