K
Kuang-Wei Chiang
Researcher at Alcatel-Lucent
Publications - 1
Citations - 36
Kuang-Wei Chiang is an academic researcher from Alcatel-Lucent. The author has contributed to research in topics: Sorting & Very-large-scale integration. The author has an hindex of 1, co-authored 1 publications receiving 36 citations.
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Patent
Method of compressing data for use in performing VLSI mask layout verification
TL;DR: A method of compressing data used in integrated circuit (IC) layout verifications includes the steps of identifying each circuit component from each layer of the IC chip, sorting each IC component in an established order, identifying predetermined parameters for each component, determining the difference in value of the parameters for pair of components in successive order, and storing the difference values for each pair of component.