An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film

Method for Manufacturing Semiconductor Device

A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.

Fan-out semiconductor chip assembly

A microelectronic connection component includes a support such as a dielectric sheet having elongated leads extending along a surface. The leads have terminal ends permanently connected to the support and tip ends releasably connected to the support. The support is juxtaposed with a further element such as a semiconductor chip or wafer, and tip ends of the leads are bonded to contacts on the wafer using a bonding tool advanced through holes in the support. After bonding, the support and the further element are moved away from one another so as to deform the leads.

Microelectronic assemblies with multiple leads

In a method for mounting a sheet-like multi-layer element for producing a microelectronic component, the sheet-like element is first bonded to an expansion ring. The expansion ring is then heated to stretch the sheet-like element. A frame ring, having an external diameter smaller than the internal diameter of the expansion ring, is then bonded to the sheet-like element. The assembly is then cooled, and the expansion ring is cut away. In another embodiment, a method is provided for bonding bond pads on a sheet-like microelectronic element to terminal pads on a microelectronic component. The microelectronic element is first placed on a rigid plate and the sheet-like element, which has been bonded to a frame ring, is placed over the microelectronic component. A disk is then placed on the sheet-like element, and force is applied to the disk, bringing the bond pads on the sheet-like element into contact with the terminal pads on the microelectronic element. Heat is then applied, forming the bonds.

Fixtures and methods for lead bonding and deformation

Multi-layer components such as circuit panels are fabricated by connecting conductive features such as traces one two or more superposed substrates using leads extending through an intermediate dielectric layer. The leads can be closely spaced to provide a high density vertical interconnection, and can be selectively connected to provide customization of the structure.

Multi-layer substrates and fabrication processes

PURPOSE:To improve the surge breakdown strength of a low voltage Zener diode and to lower the leak current value corresponding to the breakdown voltage by forming a region of the same conductivity as the main body and high in impurity concentration on the semiconductor body side of a pn junction face, and forming a guard ring deeper than at least the sum of the depths of both regions, surrounding both of them. CONSTITUTION:On the whole face of the N-type epitaxial layer 2 at the surface of an N-type semiconductor an N -type diffusion layer 3 higher in impurity concentration than this is formed in depth k. The oxide film 4 on that is etched selectively to form a contact hole 7a, and boron (p-type impurities) are implanted circularily in depth l deeper than the depth k of the diffusion layer 3 so as to form a guard ring 5. Next, boron(B) is implanted in shallower depth m than depth k and in fixed concentration into the part 3a surrounded by this so as to form a P-type diffusion layer 6 being the same conductivity type as the guard ring 5. After that, additional diffusion is applied so that Zener voltage Vz may be nearly the desired value, and an electrode 7 is filled in a contact hole 7a, and is brought into contact with the diffusion layer 6, thus a constant voltage Zener diode 10 is obtained.

Kuwatani Setsuo

Papers

Semiconductor device and manufacture thereof