Carrier aggregation technique combines multiple narrow band channels to achieve a wide bandwidth for high-speed data communication. The proposed router switch architecture reduces the circuit complexity while maintaining the flexibility to meet the requirement of carrier aggregation systems. In this work, two router switch ICs are implemented in 0.18µm CMOS technology to provide dynamic RF paths for carrier aggregation among different channels and bands. The ICs are tested with LTE R9 signals.

CMOS RF T/R router switch ICs for LTE carrier aggregation transceivers

LTE-Advanced (LTE-A) base station with carrier aggregation (CA) function can meet the larger capacity demand and improve the spectrum efficiency. To fulfill such function, the wide operational bandwidth and high isolation carrier-aggregated switch module is proposed to combine two RF signals, namely, component carriers (CCs) in this work. There are many CA scenarios defined in 3GPP TS 36.104, examples of two 20 MHz LTE-A Release-10 CCs at Band 40 and Band 1+Band 5 are used to verify the feasibility of the proposed module in both the intra-band and inter-band CA.

Wideband and high isolation RF carrier-aggregated switch module for LTE-Advanced base station

LTE-Advanced uses carrier aggregation (CA) of multiple component carriers (CCs) to achieve high-bandwidth transmission. To fulfill such technology, the novel carrier-aggregated modulator structure is proposed. In this work, the carrier-aggregated modulator is implemented in 0.18 μm CMOS technology and tested with two 10 MHz LTE-Advanced Release 10 signals to demonstrate the feasibility of the proposed architecture in both the intra-band and inter-band CA. The measured output spectrum and EVM meet the LTE-Advanced requirements.

Design of carrier-aggregated modulator for LTE-advanced

This chapter discusses the architectures of Nyquist rate Analog-to-Digital Converters (ADCs), that are embedded in systems-on-chip (SoCs) implementing some of the most widespread mobile communication, wireless and wireline connectivity standards. The typical requirements for these ADCs are presented, and the main conversion architectures are described in terms of the fundamental operations realized inside them. This constitutes a unified treatment that relates all architectures, thus providing a deeper understanding of their fundamental limitations and trade-offs. We then discuss some of the solutions recently published in the literature to improve ADC energy efficiency. Finally we disclose implementation details from two 12 bit digitally calibrated, high-speed ADCs, using the pipeline and SAR architectures.

Recent Advances and Trends in High-Performance Embedded Data Converters

L'invention concerne un dispositif de communications sans fil configure pour recevoir des signaux multiples. Le dispositif de communications sans fil comprend une architecture de recepteur mono-puce a agregation de porteuses. L'architecture de recepteur mono-puce a agregation de porteuses comprend une premiere antenne, une deuxieme antenne, une troisieme antenne, une quatrieme antenne et une puce emettrice-receptrice. La puce emettrice-receptrice comprend des recepteurs multiples a agregation de porteuses. L'architecture de recepteur mono-puce a agregation de porteuses reutilise au moins un des recepteurs a agregation de porteuses pour une diversite secondaire.

Réutilisation d'un récepteur mono-puce à agrégation de porteuses pour prendre en charge la diversité non cellulaire

To meet the IMT-Advance technical requirement, both 3GPP LTE-Advanced and IEEE 802.16m include carrier aggregation as one of the key RF technologies. Carrier aggregation uses several carriers with narrow bandwidth which will be combined in the upper layer for high data rate transmission. These carriers can be either adjacent to each other or in different bands. This work describes a transceiver architecture which adopts router structure in the RF path. In the proposed architecture, each RF path can be assigned with different number of carriers according to the corresponding requirements for each band to reduce hardware overhead. The proposed architecture is simulated with Agilent ADS and emulated with hardware for further validation.

Lai

Papers

Compact router transceiver architecture for carrier aggregation systems