This survey deals with 1/f noise in homogeneous semiconductor samples. A distinction is made between mobility noise and number noise. It is shown that there always is mobility noise with an /spl alpha/ value with a magnitude in the order of 10/sup -4/. Damaging the crystal has a strong influence on /spl alpha/, /spl alpha/ may increase by orders of magnitude. Some theoretical models are briefly discussed none of them can explain all experimental results. The /spl alpha/ values of several semiconductors are given. These values can be used in calculations of 1/f noise in devices. >

1/f Noise Sources

This timely second edition has been substantially expanded to keep students and practicing power conversion engineers ahead of the learning curve in GaN technology advancements. Acknowledging that GaN transistors are not one-to-one replacements for the current MOSFET technology, this book serves as a practical guide for understanding basic GaN transistor construction, characteristics, and applications. Included are discussions on the fundamental physics of these power semiconductors, layout and other circuit design considerations, as well as specific application examples demonstrating design techniques when employing GaN devices.

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GaN Transistors for Efficient Power Conversion

Preface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50# Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90 ) Hybrid. 10.8 The 180 Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty's Idea. 11.3 The Classical Doherty Configuration. 11.4 The 'AB-C' Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

/pdf/high-efficiency-rf-and-microwave-solid-state-power-4xdx1261hq.pdf

High Efficiency RF and Microwave Solid State Power Amplifiers

This paper reviews the current state-of-the-art in electromagnetic (EM)-based design and optimization of microwave circuits using artificial neural networks (ANNs). Measurement-based design of microwave circuits using ANNs is also reviewed. The conventional microwave neural optimization approach is surveyed, along with typical enhancing techniques, such as segmentation, decomposition, hierarchy, design of experiments, and clusterization. Innovative strategies for ANN-based design exploiting microwave knowledge are reviewed, including neural space-mapping methods. The problem of developing synthesis neural networks is treated. EM-based statistical analysis and yield optimization using neural networks is reviewed. The key issues in transient EM-based design using neural networks are summarized. The use of ANNs to speed up "global modeling" for EM-based design of monolithic microwave integrated circuits is briefly described. Future directions in ANN techniques to microwave design are suggested.

https://desi.iteso.mx/erayas/documents/cad_course/lectures/ANNs/EM_ANN_State_Art_paper.pdf

EM-based optimization of microwave circuits using artificial neural networks: the state-of-the-art

This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

Innovative design, modeling, and characterization methods are described for FET cold noise sources. A developed InP HEMT cold/hot noise source demonstrates 105 K in the 18-22 GHz range; the highest reported frequency for a FET cold noise source. Measurements confirm variable source temperature from 105 K to over 1000 K.

Design and characterization of FET based cold/hot noise sources

New methods are presented for direct extraction of thermal resistance and capacitance from pulsed IV measurements. Because thermal effects are frequency dependent, a thermal circuit is used in many models to characterize the device channel temperature as a function of frequency. Thermal resistance is determined using pulsed IV data sets taken at varied ambient temperature, while the thermal capacitance is found through use of a new normalized difference unit (NDU) for IV data. Determination of thermal subcircuit parameters from readily available pulsed IV measurements reduces the complexity of electrothermal model development for microwave transistors.

Direct measurement of thermal circuit parameters using pulsed IV and the normalized difference unit

A radiometer calibrating system (150) utilizes an adjustable noise source (100) for calibrating a radiometer. The noise source includes a transistor configured as a noise equivalent circuit having a gate port, drain port and source port. A source inductance providing series feedback for the noise source has one end coupled to the source port of the noise equivalent circuit and another end connected to the ground. A bias circuit controls the amount of DC bias applied to the noise equivalent circuit. In order to match the impedances in the noise source, an output impedance matching network is connected to the gate port of the noise equivalent circuit. The output and input impedance networks have an output port and input port, respectively. Included in the noise source is a port switch that terminates a matched load to the output port when a cold thermal radiation temperature is generated at the input port, and alternatively, the port switch terminates the matched load to the input port when the warm thermal radiation temperature is generated at the output port.

/pdf/variable-microwave-cold-warm-noise-source-gpg3n0do7c.pdf

Variable microwave cold/warm noise source

In this paper the accuracy of on-wafer calibration using space-conservative (SOLT) standards is evaluated. The calibration approach relies on measurement-based standard definitions. Results are presented using CPW standards with 50 and 300 micron offsets, over the range from .045-65 GHz. In comparing to a multi-line TRL, the magnitude of the difference between the S-parameters is less than 0.05 up to 40 GHz, and below 0.1 up to 65 GHz.

On-wafer calibration using space-conservative (SOLT) standards

A novel solution is presented for the well known capacitor discrepancy problem between large and small signal FET models. The discrepancy arises due to the two-parameter bias voltage dependence of the intrinsic FET model capacitances. The resolution is enabled by the proper choice of partial-integration constants associated with the transformation of a charge source in the large signal model to a capacitor in the small signal model. >

http://ieeexplore.ieee.org/iel5/3219/9124/00406198.pdf

Lawrence Dunleavy

Papers

Design and characterization of FET based cold/hot noise sources

Direct measurement of thermal circuit parameters using pulsed IV and the normalized difference unit

Variable microwave cold/warm noise source

On-wafer calibration using space-conservative (SOLT) standards

Resolving capacitor discrepancies between large and small signal FET models