Proximity effects cause integrated circuit features to be distorted when compared to the original mask pattern. These effects are becoming widely recognized as serious barriers to achieving effective half-micrometer and smaller wafer lithography processes. A promising remedy for proximity effects is to adjust mask feature shapes to compensate for predictable distortions in the wafer lithography process. Proximity effects are systematic -- the effects on a pattern repeat when printed with the same equipment under the same process conditions. Predicting proximity distortions is a non-trivial problem. The distortions are functions of the size and shape of each feature as well as the sizes, shapes, and spacings of nearby features. Imaging characteristics of the exposure tool, resist and etch characteristics, and effects from the underlying substrate all contribute to wafer feature distortions. We present a general method for computing proximity-corrected shapes. A technique we call "zone sampling" provides accurate models of proximity behaviors with optimum computational efficiency. Proximity behavior for arbitrary layout configurations is derived from two-dimensional density measurements (zone samples) computed from IC layout pattern data. Zone sampling provides a complete "behavior model" of combined, non-linear proximity effects, including optical, process, and underlying substrate mechanisms.

Fast proximity correction with zone sampling

A test chip has been built to study the effects of circuit layout on variability, and to characterize within-die (WID) and die-to-die (D2D) variability of delay and leakage current in 90 nm CMOS technology. Delay is obtained through the measurement of ring oscillator frequencies, and the transistor leakage current is measured by an on-chip analog-to-digital converter (ADC). It has been found that the transistor performance depends strongly on the polysilicon (poly-Si) gate density, and the spatial correlation depends on the gate orientation and the direction of poly-Si spacing. WID variation is small with three standard deviations over a mean (3sigma/mu) of around 3.5%, whereas D2D and systematic layout-induced variations are significant, with a 3sigma/mu D2D variation of ~15% and a maximum layout-induced frequency shift of 10%. Finally, a set of guidelines is proposed to help circuit designers mitigate the effects of process variations on CMOS performance.

Measurements and Analysis of Process Variability in 90 nm CMOS

Process variability in deeply scaled CMOS has both random and systematic components, with a varying degree of spatial correlation. A test chip has been built to study the effects of circuit layout on variability of delay and power dissipation in 90nm CMOS. The delay is characterized through the spread of ring oscillator frequencies and the transistor leakage is measured by using an on-chip ADC

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Measurements and analysis of process variability in 90nm CMOS

Extreme ultraviolet (EUV) lithography is a promising candidate for high-volume manufacturing at the 22-nm half-pitch node and beyond. EUV projection lithography systems need to rely on reflective optical elements and masks with oblique illumination for image formation. It leads to undesired effects such as pattern shift and horizontal-to-vertical critical dimension bias, which are generally reported as shadowing. Rule-based approaches proposed to compensate for shadowing include changing mask topography, introducing mask defocus, and biasing patterns differently at different slit positions. However, the electromagnetic interaction between the incident light and the mask topography with complicated geometric patterns, such as optical diffraction, not only causes shadowing but also induces proximity effects. This phenomenon cannot be easily taken into account by rule-based corrections and thus imposes a challenge on a partially model-based correction flow, the so-called combination of rule- and model-based corrections. A fully model-based correction flow, which integrates an in-house optical proximity correction algorithm with rigorous three-dimensional mask simulation, is proposed to simultaneously compensate for shadowing and proximity effects. Simulation results for practical circuit layouts indicate that the fully model-based correction flow significantly outperforms the partially model-based one in terms of correction accuracy, while the total run time is slightly increased.

Fully model-based methodology for simultaneous correction of extreme ultraviolet mask shadowing and proximity effects

It is important to reduce the optical proximity correction (OPC) runtime while maintaining a good result quality. In this paper, we obtain a better formula, which theoretically speeds up the widely used method, optimal coherent approximations (OCA's), by a factor of 2times. We speed up the OPC algorithm further by making it intensity based (IB-OPC), because it requires much less intensity simulations than the conventional edge placement error (EPE) based OPC algorithms. In addition, the IB-OPC algorithm, which uses the efficiently computed sensitivity information, converges faster than the EPE based OPC. Our IB-OPC experimental results show a runtime speedup of up to 15times with a comparable result quality as of the EPE based OPC.

/pdf/a-novel-intensity-based-optical-proximity-correction-3ca6db5uak.pdf

A novel intensity based optical proximity correction algorithm with speedup in lithography simulation

As post-litho process effects account for a larger and larger portion of CD error budgets, process simulation terms must be given more weight in the models used for proximity correction. It is well known that for sub-90 nm processes resist and etch effects can no longer be treated as a small perturbation on a purely optical (aerial image) OPC model. The aerial image portion of the model must be combined in a more appropriate way with empirical terms describing resist and etch effects. The OPC engineer must choose a model form which links an optical component with a resist/etch component in a manner that balances efficiency, robustness and fidelity to the aerial image, among other factors. No single way of connecting litho and etch models is ideal in all cases; the best form of linkage depends on the particular litho and etch process to be simulated. In this paper, we provide practical guidelines for linking litho and etch components of a model, using a representative 70 nm process with a large etch bias as an example. This 70 nm case study, which is representative of many sub-90 nm processes that rely on etch to shrink critical features, presents special challenges for OPC modeling. For the process under study, lines were are printed in resist at 120 nm, and the litho model was verified via resist SEM measurements taken at the resist edge. Note that a thresholded aerial image is not well-characterized a distance 25 nm from the resist edge. This is roughly the distance the edge moves back due to the etch step. Although in some cases etch bias can be calculated from aerial image contrast, in general etch bias cannot be predicted from the aerial image because litho and etch are governed by different underlying physics. The model forms available for linking litho and etch range from the efficient “lumped” form, which combines litho and etch simulation in a single model, to a highly accurate two-stage form which separates the two components. In this paper we evaluate the following model forms for applicability to the 70 nm process under study: 1) Aerial image/load kernel combined (“lumped”) model form 2) Aerial image/rule offset “hybrid” model form 3) Separate litho and etch models (2-stage correction)

Advanced model formulations for optical and process proximity correction

Model based Optical Proximity Correction work is currently performed by segmenting patterns in a layout and iteratively applying corrections to these segments for a set number of iterations This is an open loop control methodology that relies on a finely tuned algorithm to arrive at a proper correction A goal of this algorithm is to converge in the fewest number of iterations possible As technology nodes become smaller, different correction areas tend to correct at different rates, and these correction rates are diverging with process node This leads to more iterations being required to converge to a final OPC solution, the consequence of which is an increased runtime and tapeout cost The current solution to this problem is to use proportional damping factors to attempt to bring different structure types to a solution Classical control theory provides tools to optimize the convergence of these processes and to speed up convergence in physical systems Introducing derivative and integral control while continuing use of proportional control should reduce the number of iterations needed to converge to a final solution as well as optimize the convergence for varied configurations

Classical control theory applied to OPC correction segment convergence

In follow-up of related contributions at the past three symposium editions, our simulation study arrived at this question. As shown before, (local) mask defects and non-local mask deficiencies (NLMDs) act as triggers for increased stochastic failure probability on the EUV imaged resist pattern on wafer. Mask roughness is such an NLMD. The three types studied comprise multilayer (ML) ripple, which relates to a non-fully planar coating of the ML mask stack, mask absorber lineedge roughness and roughening of the ML. For the latter the study was restricted to roughening of the ruthenium capping layer only, which may already happen during the patterning step of the absorber during mask making. Each of the 3 roughness types is studied standalone and in combination. An alternative technique is presented that allows to define tolerance limits for mask roughness, without requiring massive, time-consuming stochastic simulations. It is based on studying how roughness-induced background light is passing through the projection optics. Our results, for anamorphic imaging at 0.55 NA, suggest the importance of limiting mask roughness beyond state-of-the-art.

Lawrence L. Melvin

Papers

Advanced model formulations for optical and process proximity correction

Classical control theory applied to OPC correction segment convergence

Does high-NA EUV require tighter mask roughness specifications: a simulation study