This paper presents an explicit analysis of the bandwidth and port imbalance of a subquarter-wavelength transmission-line (t-line) transformer and verifies this with the design of a two-stage D-band power amplifier (PA) Series power combining techniques incorporate both stacked heterojunction bipolar transistors (HBTs) and power combining using an 8-way sub-quarter-wavelength t-line transformer above 100 GHz The extremely compact power combining methodology leads to a small die area of 062 mm2 and a record 254-mW/mm2 output power per unit die area The PA has been fabricated in a 90-nm silicon germanium BiCMOS technology and produces more than 21-dBm output power over the frequency range of 114–130 GHz with a peak output power of $160~{\mathrm{mW}}\approx 22~{\mathrm{ dBm}}$ at 120 GHz and a 3-dB small-signal bandwidth of 35 GHz This output power is 32% higher than the highest prior art, while the chip area is 77% smaller

Compact Series Power Combining Using Subquarter-Wavelength Baluns in Silicon Germanium at 120 GHz

A miniaturized Marchand balun combiner is proposed for a W-band power amplifier (PA). The proposed combiner reduces the electrical length of the transmission lines (transmission line) from about 80 $^{\circ}$ to 30 $^{\circ}$ , when compared with a conventional Marchand balun combiner. Implemented in a 1-V 65-nm CMOS process, the presented PA achieves a measured saturated output power of 11.9 dBm and a peak power-added efficiency of 9.0% at 87 GHz. The total chip area (with pads) is ${\hbox{0.77}}\times {\hbox{0.48}}\ {\hbox{mm}}^{2}$ , where the size of the balun combiner is only ${\hbox{0.36}}\times {\hbox{0.13}}\ {\hbox{mm}}^{2}$ .

A W-Band Power Amplifier Utilizing a Miniaturized Marchand Balun Combiner

In this paper, we report a high-performance balun with characteristics suitable for future broadband sub-THz differential circuits. The idea of the balun is based on three asymmetric coupled lines, which enhance the odd mode capacitances to equalize the even/odd mode phase velocities. The inner line of the three asymmetric coupled lines is configured to form the open stub ( λ /2), while the outer lines form short stubs ( λ /4). To further reduce the phase imbalance, the short stubs in one of the arms of the balun are connected with vias and a lower metal layer. The balun is developed using the standard 130-nm SiGe BiCMOSback-end process and EM simulated with ADS momentum and Sonnet. The −10-dB reflection coefficient (S 11 ) bandwidth of the balun is 136 GHz (88–224 GHz). It shows insertion loss (including RF pads) <1.5 dB, phase imbalance <7 degrees, and amplitude imbalance <1 dB at 94–177 GHz. Furthermore, a scaled-down version of the balun operates on the WR-6, WR-5, and WR-4 frequency bands without significant degradation in its performance. Such characteristics of the balun make it an ideal candidate for various broadband differential circuits.

https://www.mdpi.com/2076-3417/9/9/1907/pdf

High Performance Asymmetric Coupled Line Balun at Sub-THz Frequency

This article presents a compact 300-GHz transmitter front end manufactured in a 130-nm SiGe BiCMOS process. The transmitter consists of a 240-GHz amplifier multiplier chain (AMC) and a modified 300-GHz Gilbert mixer. Limited by the space between top two thick metal layers of the SiGe process, the coupling coefficient between the coils, which form a transformer-based balun, is usually small at subterahertz (THz). Therefore, the vertical or horizontal coupling single-turn transformer-based balun will exhibit large insertion loss at around 300 GHz. In this work, a self-shielded Marchand balun (SSMB) with an enhancement to the coupling coefficient is proposed, which is realized by a novel multilayer metal topology with self-shielded coupling (SSC). The AMC is composed of a 120-GHz frequency doubler, a 120-GHz two-stage power amplifier (PA), and a two-way power synthesis balanced frequency doubler. This AMC exhibits a measured peak output power of 5.5 dBm at 252 GHz, with 48-GHz 3-dB bandwidth from 212 to 260 GHz. The transmitter chip achieves a maximum output power of −4.1 dBm at 300 GHz and delivers an output power better than −10 dBm from 270 to 315 GHz. Over the 30-GHz 3-dB bandwidth from 280 to 310 GHz, the transmitter shows a maximum OP1dB of −6.5 dBm at 296 GHz, a peak conversion gain of −11.2 dB at 298 GHz, and a local oscillator (LO)-to-RF leakage rejection better than 40 dB, with only 300-mW dc power consumption. Compared with other state of the arts, the transmitter exhibits a comparable output power among silicon-based transmitters near 300 GHz.

A 300-GHz Transmitter Front End With −4.1-dBm Peak Output Power for Sub-THz Communication Using 130-nm SiGe BiCMOS Technology

A modified version of the Marchand balun based on three folded symmetric coupled lines is presented in this paper. The S-parameters of a quasi-TEM coupler are derived in the case when even- and odd- mode phase velocities are unequal. The effects on the performance of the Marchand balun are then investigated by analyzing its calculated S-paramaters under different phase-velocity-ratios of both the modes. Measurements show a minimum insertion loss of 2.3 dB, and a 1-dB insertion loss bandwidth from 200–325 GHz. The amplitude imbalance is less than 1.5 dB upto 325 GHz, while the phase imbalance is below 10 deg upto 273 GHz. Through out the operating range the input return loss remains higher than 15 dB. The balun is fabricated in a 130nm SiGe BiCMOS process and occupies only 0.015mm2, excluding the pads.

A 200–325-GHz wideband, low-loss modified Marchand balun in SiGe BiCMOS technology

The analysis and design of a millimeter-wave passive balun on silicon substrate with small size and good balance is presented. The reason for the imbalance of the balun is analyzed and a novel method using two grounded T bars beneath the coupled lines to tune the balance is proposed. The balun was fabricated in a 65 nm CMOS process, by using broadside coupled lines with small separation, the length of balun is reduced, resulting in a size of only 0.01 mm2. In the 57-67 GHz band, the measured amplitude imbalance is less than 0.5 dB and the phase imbalance is less than 1 °. This method for optimizing the imbalance of balun is efficient and it does not increase the size of balun.

A Miniaturized Marchand Balun in CMOS With Improved Balance for Millimeter-Wave Applications

In this paper, design and measurements of a fully integrated power amplifier (PA) are presented. The PA consists of two amplifying chains each having a driver and a power stage. A low loss on chip power combiner combines the outputs from two amplifying chains, and also performs impedance transformation and differential to single-ended conversion. To linearize the PA, the driver stage is biased in class-C, acting as a pre-distorter for the power stage which is biased in class-AB. The linearization scheme is validated by measurements, improving the third order intermodulation distortion (IMD3) by 7dB, output referred 1-dB compression point by 4dB, and adjacent channel leakage ratio (ACLR) by 4.5 dB. With a supply voltage of 2.2V, the PA delivers a saturated output power of 26.1 dBm with a power added efficiency (PAE) of 26.8% at operating frequency of 2.24 GHz. The measured power gain of the PA is 21.8 dB, and the output referred 1-dB compression point is 25.4 dBm. The ACLR1 (5 MHz offset) is better than −33 dBc while transmitting a 23dBm WCDMA signal. The circuit is manufactured in a standard 65nm CMOS process and occupies 1mm2 of chip area.

Leijun Xu

Papers

A Miniaturized Marchand Balun in CMOS With Improved Balance for Millimeter-Wave Applications

A fully integrated 26 dBm linearized RF power amplifier in 65nm CMOS technology