Showing papers by "Luigi Chisci published in 1987"
TL;DR: Efficient parallel architectures for recursive least squares with directional forgetting are presented and make use of the UD algorithm, here properly modified so as to embody the directional-forgetting variant.
Abstract: Efficient parallel architectures for recursive least squares with directional forgetting are presented. Two different arrays are proposed. The first employs O(n) processors and exhibits a 1/(2n + 3) throughput rate, n being the number of parameters to be estimated. The second can achieve a 1/(n + 2) throughput rate at the expense of an O(n2) processor complexity. Both architectures make use of the UD algorithm, here properly modified so as to embody the directional-forgetting variant.
14 citations