This paper addresses the design of reactive real-time embedded systems. Such systems are often heterogeneous in implementation technologies and design styles, for example by combining hardware application-specific integrated circuits (ASICs) with embedded software. The concurrent design process for such embedded systems involves solving the specification, validation, and synthesis problems. We review the variety of approaches to these problems that have been taken.

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Design of embedded systems: formal models, validation, and synthesis

A fundamental relationship between the controllability of a language with respect to another language and a set of uncontrollable events in the Supervisory Control Theory initiated by (Ramadge and Wonham, 1989) and bisimulation of automata models is derived. The theoretical results relating bisimulation to controllability support an efficient solution to the Basic Supervisory Control Problem. Using (Fernandez, 1990) generalization of the partition refinement algorithm of (Paige and Tarjan, 1987), it is possible to find a partition which represents the supremal controllable sublanguage of an automaton with respect to the language of another automaton and a set of events in a worst-case running time of O( m\log(n)), where m is the number of transitions and n is the number of states. Utilizing the bisimulation property of language controllability and derived relationships between automata languages and input/output finite-state machine behaviors, a precise relationship is formally derived between Supervisory Control Theory and the system-theoretic problem posed by (DiBenedetto et al., 1994) called Strong Input/Output FSM Model Matching. Specifically, it is proven that in deterministic settings instances of each problem can be mapped to the other framework and solved.

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Bisimulation, the Supervisory Control Problem and StrongModel Matching for Finite State Machines

The problem of model matching for finite state machines (FSMs) consists of finding a controller for a given open-loop system so that the resulting closed-loop system matches a desired input-output behavior. In this paper, a set of model matching problems is addressed: strong model matching (where the reference model and the plant are deterministic FSMs and the initial conditions are fixed), strong model matching with measurable disturbances (where disturbances are present in the plant), and strong model matching with nondeterministic reference model (where any behavior out of those in the reference model has to be matched by the closed-loop system). Necessary and sufficient conditions for the existence of controllers for all these problems are given. A characterization of all feasible control laws is derived and an efficient synthesis procedure is proposed. Further, the well-known supervisory control problem for discrete-event dynamical systems (DEDSs) formulated in its basic form is shown to be solvable as a strong model matching problem with measurable disturbances and nondeterministic reference model.

Model matching for finite-state machines

We propose the use of the logic S1S as a mathematical framework for studying the synthesis of sequential designs. We will show that this leads to simple and mathematically elegant solutions to problems arising in the synthesis and optimization of synchronous digital hardware. Specifically, we derive a logical expression which yields a single finite state automaton characterizing the set of implementations that can replace a component of a larger design. The power of our approach is demonstrated by the fact that it generalizes immediately to arbitrary interconnection topologies, and to designs containing nondeterminism and fairness. We also describe control aspects of sequential synthesis and relate controller realizability to classical work on program synthesis and tree automata.

/pdf/sequential-synthesis-using-s1s-2jzayp4tl5.pdf

Sequential synthesis using S1S

We address a problem of finding a finite state machine (FSM), which composed with a given FSM, satisfies a given specification. The composition we use is the standard synchronous automata composition restricted to cases which correctly model hardware interconnection. For the satisfaction relation, we use language containment. We present a procedure that will generate a solution (if one exists) which is maximal, i.e. contains behaviors of all other solutions.

https://link.springer.com/content/pdf/10.1007%2F3-540-60045-0_57.pdf

Supervisory Control of Finite State Machines

This paper addresses the problem of finding a controller for a given open loop system so that the resulting closed loop system matches one of several acceptable input-output behaviors described by a possibly non-deterministic FSM. A characterization of all feasible control laws is given and an efficient synthesis procedure is proposed.

http://ieeexplore.ieee.org/iel2/3470/10220/00478834.pdf

M.D. DiBenedetto

Papers

Strong model matching for finite state machines with non-deterministic reference model