M
M. Nizamuddin
Researcher at Jamia Millia Islamia
Publications - 23
Citations - 162
M. Nizamuddin is an academic researcher from Jamia Millia Islamia. The author has contributed to research in topics: CMOS & Transconductance. The author has an hindex of 5, co-authored 17 publications receiving 80 citations.
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Design, simulation and comparative analysis of CNT based cascode operational transconductance amplifiers
TL;DR: In this work, design and calibrated simulation of carbon nanotube field effect transistor (CNTFET)-based cascode operational transconductance amplifiers (COTA) have been performed and it has been observed that the performance of the proposed COTAs can be significantly improved by using optimum values of N, S and DCNT.
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Design and Comparative Analysis of High Performance Carbon Nanotube-Based Operational Transconductance Amplifiers
TL;DR: In this article, three types of carbon nanotube (CNT) based operational transconductance amplifiers (OTAs) have been designed and simulated and compared with the conventional CMOS-based OTA.
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A Hybrid Fuzzy-Genetic Algorithm for Performance Optimization of Cyber Physical Wireless Body Area Networks
TL;DR: A fuzzy-logic-based clustering protocol for data routing in WBANs that provides enhanced network lifetime with a uniform distribution of routing load and is compared with existing WBAN routing protocols and is found to be better.
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Energy Budget Based Multiple Attribute Decision Making (EB-MADM) Algorithm for Cooperative Clustering in Wireless Body Area Networks
TL;DR: This work proposes the design of low power, clustering based data routing protocol for WBANs that incorporates a novel “Energy Budget based Multiple Attributes Decision Making Algorithm (EB-MADM)” for dynamic cluster head selection.
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Design, simulation and comparative analysis of a novel FinFET based astable multivibrator
TL;DR: In this article, design and simulation of FinFET and CMOS based Astable Multivibrator (AMV) have been performed and performance of proposed circuit was compared by varying resistance-capacitance (R-C ) delay topology, supply voltage (V dd ) and operating temperature (T) at 45 nm technology node using spice simulator.