Taking advantage of synchronous and asynchronous paradigms, a new style of design, called Globally Synchronous Locally Asynchronous (GSLA), has achieved very interesting results. In this paper, we propose a synchronous wrapper that allows the communication of “synchronous to asynchronous to synchronous” modules. Internally, the proposed interface comprises an asynchronous module. The GSLA design style is interesting for Field-Programmable Gate Array (FPGA) platforms because it facilitates the design of Application Specific Integrated Circuits (ASIC). Through two case studies, the “differential equation solver” and the “FIR Filter”, we show that the proposed synchronous wrapper presents a reduction of up to 27% in the processing time and an increase of up to 747% in the global clock rate when compared with the synchronous design.

A synchronous wrapper for high-speed heterogeneous systems on FPGAs

This paper presents a portable and low cost data acquisition (DAQ) system for Piezoelectric Cymbal Transducer (PCT) energy harvesting system. Conventional DAQ system is operates based on bulky and expensive personal computer (PC) which is inflexible to be used in PCT energy harvesting system. The proposed system consists of self-assembly PCT, electrical energy harvesting circuit and ARMmbed microcontroller. Direct mechanical compression force via hand press is induced onto the PCT in DAQ sampling works. The efficiency of the proposed DAQ system is verified through Digilent electronics explorer board (EE board). The measured sampling data is available in two modes, which are on-site monitoring using graphic liquid crystal display (GLCD) and online monitoring via WebSocket server. The test results have demonstrated high accuracy of the proposed DAQ system with maximum error of 0.4% and 1.05% in voltage and energy measurements, respectively. The proposed microcontroller based DAQ system fulfils industrial and consumer demand in term of cost effective, flexible and high efficiency design.

Data acquisition system for Piezoelectric Cymbal Transducer energy harvesting

Taking advantage of synchronous and asynchronous paradigms, a new style of design called Globally Synchronous Locally Asynchronous (GSLA) has achieved very interesting results. In this paper, we propose a high-performance interface that allows the communication of synchronous to asynchronous to synchronous modules. Internally, the proposed interface comprises an asynchronous module. The GSLA design style is the most suitable one for FPGA (Field-Programmable Gate Array) platforms, because it facilitates the SoC (Systems–on-Chip) design. Through a case study, the “differential equation solver”, we show that the proposed interface presents a reduction of 33% in the processing time when compared with a synchronous design. The proposed interface lets you interact with other synchronous modules in a frequency up to 500 MHz.

http://ieeexplore.ieee.org/iel7/7814931/7815564/07815572.pdf

An architecture for globally-synchronous locally-asynchronous systems on FPGAs

The dynamic characteristics tracking system of maglev train gets speed curve and current position of the maglev train by monitoring and calculating data from traction linear motor system to ensure the maglev train be safe under any circumstances. The key to solve this problem is to make sure the system has high performance of communication and real-time computing ability. This paper gives a novel design of hardware and software implementation of the dynamic characteristics tracking system. The hardware solutions include FPGA execution device, UDP and RS485 communication interface. The software platform is finished under LabVIEW environment. It is proved that the calculation and communication of the whole system is completion within 3ms. The experimental results shows that the whole system meet requirements of real-time, stability and reliability.

Design and implementation of dynamic characteristics tracking system of maglev train based on real-time target and communication interface

QCM (Quartz Crystal Microbalance) multi-sensors are widely used in biosensors and chemical sensors. The sensing film materials coated on their electrodes will determine the characteristic of the sensors. In gas or odor classification, the combination characteristic of each sensor will form a pattern that will be used to infer the result. The related research has carried out sensor characterization, sensor surface modification, development of an electronic signal processing system, and using machine learning to process the sensor signal. However, the integration and optimization of the processing still need to be done to support the success of the application stage and the search for new techniques for faster, portable, and configurable multisensor signal processing. This paper will describe a conceptual idea of generic hardware integrating frequency counter and signal processing using a neural network for multisensor QCM Processing implemented using FPGA SoC.

A Generic FPGA Module for QCM Sensor Array Processing using Neural Network

In real time process, multiple heterogeneous signals can be acquire with the help of data acquisition and processing (DAQP) and process them in real time process. The main objective of this technology is to monitor different levels of signals from different sensors without any additional usage of the hardware devices. The proposed system is design in system on chip via Field Programmable Gate Array (FPGA) to check the speed of the acquired signals. Various modules of the conceptual designs are implemented and verified using LabVIEW graphical programming. The hardware testing is implemented with the help of NI-DAQ and NI-FPGA. This testing allows for high speed processing and also keeping the device cost less.

Design of high performance system-on-chips using Field Programmable Gate Arrays (FPGA)

The data acquisition and processing (DAQP) is design to acquire multiple heterogeneous signals and processing them in real time process. The main objective of this technology is to monitor different levels of signals from different sensors without any additional usage of the hardware devices. The proposed system is design in system on chip via Advanced RISC Machine (ARM) to check the speed of the acquired signals. Various modules of the conceptual designs are implemented and verified using Lab VIEW graphical programming. The hardware testing is implemented with the help of NI-DAQ and NI-ARM This testing allows for high speed processing and also keeping the device cost less.

M. Rubini

Papers

Design of high performance system-on-chips using Field Programmable Gate Arrays (FPGA)

An efficient hardware multichannel data acquisition and processing (DAQP) system using ARM