The ADAPTIVE Service eXecutive (ASX) is a highly modular and extensible object-oriented framework that simplifies the development and configuration of distributed applications on shared memory multi-processor platforms. This paper describes the structure and functionality of the ASX framework's object-oriented architecture. In addition, the paper presents the results of performance experiments conducted using ASX-based implementations of connection-oriented and connectionless protocols from the TCP/IP protocol family. These experiments measure the performance impact of alternative methods for parallelizing communication protocol stacks. Throughout the paper, examples are presented to indicate how the use of object-oriented techniques facilitate application extensibility, component reuse, and performance enhancement.

https://www.dre.vanderbilt.edu/~schmidt/PDF/C++-USENIX-94.pdf

ASX: an object-oriented framework for developing distributed applications

This paper presents a system for billing users for their TCP traffic. This is achieved by postponing the establishment of connections while the user is contacted, verifying in a secure way that they are prepared to pay. By presenting the user with cost and price information, the system can be used for cost recovery and to encourage efficient use of network resources. The system requires no changes to existing protocols or applications and can be used to recover costs between cooperating sites. Statistics collected from a four-day trace of traffic between the University of California, Berkeley, and the rest of the Internet demonstrate that such a billing system is practical and introduces acceptable latency. An implementation based on the BayBridge prototype router is described. Our study also indicates that pricing schemes may be used to control network congestion either by rescheduling time-insensitive traffic to a less expensive time of the day, or by smoothing packet transfers to reduce traffic peaks. >

Billing users and pricing for TCP

Virtual machines (VMs) are commonly used to distribute programs in an architecture-neutral format, which can easily be interpreted or compiled. A long-running question in the design of VMs is whether stack architecture or register architecture can be implemented more efficiently with an interpreter. We extend existing work on comparing virtual stack and virtual register architectures in two ways. Firstly, our translation from stack to register code is much more sophisticated. The result is that we eliminate an average of more than 47% of executed VM instructions, with the register machine bytecode size only 25% larger than that of the corresponding stack bytecode. Secondly we present an implementation of a register machine in a fully standard-compliant implementation of the Java VM. We find that, on the Pentium 4, the register architecture requires an average of 32.3% less time to execute standard benchmarks if dispatch is performed using a C switch statement. Even if more efficient threaded dispatch is available (which requires labels as first class values), the reduction in running time is still approximately 26.5% for the register architecture.

/pdf/virtual-machine-showdown-stack-versus-registers-52haa2e7cv.pdf

Virtual machine showdown: stack versus registers

Parallel processing has been proposed as a means of improving network protocol throughput Several different strategies have been taken towards parallelizing protocols A relatively popular approach is packet-level parallelism, where packets are distributed across processorsThis paper provides an experimental performance study of packet-level parallelism on a contemporary shared-memory multiprocessor We examine several unexplored areas in packet-level parallelism and investigate how various protocol structuring and implementation techniques can affect performance We study TCP/IP and UDP/IP protocol stacks, implemented with a parallel version of the x-kernel running in user space on Silicon Graphics multiprocessorsOur results show that only limited packet-level parallelism can be achieved within a single connection under TCP, but that using multiple connections can improve available parallelism We also demonstrate that packet ordering plays a key role in determining single-connection TCP performance, that careful use of locks is a necessity, and that selective exploitation of caching can improve throughput We also describe experiments that compare parallel protocol performance on two generations of a parallel machine and show how computer architectural trends can influence performance

/pdf/performance-issues-in-parallelized-network-protocols-39lzv45udf.pdf

Performance issues in parallelized network protocols

We investigate how to exploit shared memory multiprocessors for parallel protocol processing. We present a multiprocessor implementation of the x-kernel protocol environment from the University of Arizona. A "processor-per-message" paradigm is used to partition the work over processors. Locks are used to protect shared protocol state and data. Mutual exclusion by locking can be costly if the parallel protocol code frequently accesses shared state and data. This paper addresses the effect of locking on performance.The x-kernel is implemented in user address space on a Sequent Symmetry. Performance results of UDP/IP and TCP/IP are given, and we compare them to performance predictions from simulations. The measured speedups for the parallel implementations relative to the sequential ones are more than 12 times for UDP and 3 times for TCP. These limits are set by locking and machine contention.

Locking effects in multiprocessor implementations of protocols

A Parallel Approach to OSI Connection-Oriented Protocols

The design of a parallel protocol processing system for a host system connected to an asynchronous transfer mode (ATM) network is described. Interesting aspects of the design are that the AAL5 adaptation layer is realized in hardware directly on the network adapter, and that the network adapter semetric interfaces to a multiprocessor using the processor's memory bus. Support also exists for implementing parallel protocols up to and including the application layer. Parallel implementations of TCP/IP, ISO Session, and presentation protocols are outlined. >

Parallel host interface for an ATM network

The effects of packet network error and loss on MPEG-2 video streams are very different from those in either wireless bitstreams or cell-based networks (ATM). We report a study transporting high-quality MPEG-2 video over an IP network. Our principal objective is to investigate the effects of network impairments at the IP layer, in particular packet loss in congested routers, on MPEG-2 video reconstruction. We have used an IP testbed network rather than simulation studies in order to permit evaluation of actual transmitted video quality by several means. We have developed a data-logging video client to permit off-line error analysis. Analysis requires video stream resynchronization and objective quality measurement. We have studied MPEG-2 video stream transport errors, error-affected video quality and error sources. We have also investigated the relationship of packet loss to slice loss, picture loss, and frame error. We conclude that slice loss is the dominant factor in video quality degradation.

Transport of MPEG-2 Video in a Routed IP Network

Keynote address. Quality of service. Architecture. Parallel implementations and error handling. Protocols. Implementation and performance. Posters.

Mabo Robert Ito

Papers

A Parallel Approach to OSI Connection-Oriented Protocols

Parallel host interface for an ATM network

Transport of MPEG-2 Video in a Routed IP Network

Protocols for High-Speed Networks IV

Interfacing a Multiprocessor Protocol Engine to an ATM Network