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Majid Sanaye-Pasand

Researcher at University of Tehran

Publications -  187
Citations -  4906

Majid Sanaye-Pasand is an academic researcher from University of Tehran. The author has contributed to research in topics: Fault (power engineering) & Electric power system. The author has an hindex of 37, co-authored 169 publications receiving 3933 citations. Previous affiliations of Majid Sanaye-Pasand include University of Calgary.

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A Traveling-Wave-Based Protection Technique Using Wavelet/PCA Analysis

TL;DR: In this paper, the authors proposed a powerful high-speed traveling-wave-based technique for the protection of power transmission lines, which uses principal component analysis to identify the dominant pattern of the signals preprocessed by wavelet transform.
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A Traveling-Wave-Based Methodology for Wide-Area Fault Location in Multiterminal DC Systems

TL;DR: In this article, the traveling-wave principle along with two graph theory-based lemmas is deployed to locate the fault by sectionalizing the graph representation of the MTDC system.
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New centralised adaptive load-shedding algorithms to mitigate power system blackouts

TL;DR: In this article, two centralised adaptive load shedding algorithms are proposed for under-frequency load shedding, one is response-based and the other one is a combination of event-based, response-and responsebased methods.
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Enhancement of Power System Stability Using Adaptive Combinational Load Shedding Methods

TL;DR: In this article, three adaptive combinational load shedding methods are proposed to improve operation of the conventional underfrequency load shedding scheme in order to enhance power system stability following severe disturbances, where load shedding is started from the locations which have higher voltage decay for longer period of time.
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Fault Type Classification in Microgrids Including Photovoltaic DGs

TL;DR: Two new classifiers proposed in this paper determine the fault type accurately for not only microgrids with photovoltaic DGs, but for any three-phase system, with low computational burden, and operate successfully for high resistance faults.