The invention provides a single mask, low temperature reactive ion etching process for fabricating high aspect ratio, released single crystal microelectromechanical structures independent of crystal orientation. A dielectric mask (12) on a single-crystal substrate (154) is patterned to define isolating trenches. A protective conformal layer (28) is applied to the resultant structure. The conformal layer (28) on the floor of the trenches is removed and a second etch deepens the trench to expose the mesa walls which are removed during the release step by isotropic etching. A metal layer (44) is formed on the resultant structure providing opposed plates (156) and (158) of a capacitor. The cantilever beam (52) with the supporting end wall (152) extends the grid-like structure (150) into the protection of the deepened isolation trenches (54). A membrane can be added to the released structures to increase their weight for use in accelerometers, and polished for use as movable mirrors.

Microstructures and single mask, single-crystal process for fabrication thereof

A micromechanical capacitive accelerometer is provided from a single silicon wafer. The basic structure of the micromechanical accelerometer is etched in the wafer to form a released portion in the substrate, and the released and remaining portions of the substrate are coated with metal under conditions sufficient to form a micromechanical capacitive accelerometer. The substrate is preferably etched using reactive-ion etching for at least the first etch step in the process that forms the basic structure, although in another preferred embodiment, all etching is reactive-ion etching. The accelerometer also may comprise a signal-conditioned accelerometer wherein signal-conditioning circuitry is provided on the same wafer from which the accelerometer is formed, and VLSI electronics may be integrated on the same wafer from which the accelerometer is formed. The micromechanical capacitive accelerometer can be used for airbag deployment, active suspension control, active steering control, anti-lock braking, and other control systems requiring accelerometers having high sensitivity, extreme accuracy and resistance to out of plane forces.

Micromechanical accelerometer for automotive applications

A microelectromechanical compound stage microactuator assembly capable of motion along x, y, and z axes for positioning and scanning integrated electromechanical sensors and actuators is fabricated from submicron suspended single crystal silicon beams. The microactuator incorporates an interconnect system for mechanically supporting a central stage and for providing electrical connections to componants of the microactuator and to devices carried thereby. The microactuator is fabricated using a modified single crystal reactive etching and metallization process which incorporates an isolation process utilizing thermal oxidation of selected regions of the device to provide insulating segments which define conductive paths from external circuitry to the actuator components and to microelectronic devices such as gated field emitters carried by the actuator.

Compound stage MEM actuator suspended for multidimensional motion

A single mask, low temperature reactive ion etching process for fabricating high aspect ratio, released single crystal microelectromechanical structures independently of crystal orientation.

Electrically isolated released microstructures

Novel steroid sulphatase inhibitors are disclosed as well as pharmaceutical compositions containing them for use in the treatment of oestrone dependent tumours, especially breast cancer. The novel steroid sulphatase inhibitors are: sulphamate esters of formula (1), where R1 and R2 are each H, alkyl, alkenyl, cycloalkyl or aryl, or together represent an alkylene group option-ally containing a heteroatom e.g. -O- or -NH-; and -O-polycycle represents the residue of a polycyclic alcohol, preferably a sterol, most preferably a 3-sterol. Preferred compounds are oestrone-3-sulphamate and N,N-dimethyl oestrone-3-sulpha-mate.

Steroid sulphatase inhibitors

In a process for structuring a disk-shaped, preferably monocrystalline semiconductor body (10), in particular made of silicon, at least one recess (13, 13a, 13b) is made by the photomasking technique. The recess has lateral limiting surfaces which are essentially perpendicular to the two main surfaces of the semiconductor body (10) and a base surface which is essentially parallel to the two main surfaces. The recess is produced by anisotropic reactive ionic etching of one of the two main surfaces. The recess (13, 13a, 13b) is then provided with widened portion (17) in the vicinity of its base surface by lateral etching.

Verfahren zur strukturierung eines halbleiterkoerpers

Process for structuring a semiconductor body

Es wird ein Sensor zur Bewegungsmessung, insbesondere zur Schwingungs-, Neigungs- oder Beschleunigungsmessung vorgeschlagen, der aus einem monokristallinen Siliziumwafer hergestellt ist. Aus dem Siliziumwafer ist zumindest ein in der Waferebene schwingungsfahiges, vertikal zur Waferoberflache angeordnetes Paddel herausgeatzt. Auserdem sind Mittel zur Auswertung der Auslenkung des zumindest einen Paddels vorhanden. Die Vorderseite und die Ruckseite des Siliziumwafers sind (110)-Oberflachen, und die seitlichen Begrenzungswande der Atzgraben sind (111)-Oberflachen. Bei der Anordnung des mindestens einen Paddels werden die kristallographischen Winkel berucksichtigt, die die (111)-Ebenen mit und in der (110)-Ebene bilden.

Kristallorientierter bewegungssensor und verfahren zu dessen herstellung

(A) In the prodn. of contact vias with sloping sides in insulation layers, which are applied onto a semiconductor material and which consist of e.g. oxide, oxynitride or nitride, by isotropic or anisotropic plasma etching with a variable etch rate, at least two insulation layes (2, 3) with different etch rates are arranged so that the etch rates decrease in the direction towards the semiconductor material (II) and the via (6) diameter decreases with increasing etch depth. (B) Also claimed is a semiconductor chip (e.g. of silicon) with metal conductor levels separated by one or more superposed insulation layers in which vias can be etched, the novelty being the provision of at least two insulation layers (2, 3) which can be etched to form vias of dia. decreasing with increasing via depth. ADVANTAGE - The via shape gives good connection between different wiring levels without the need for an auxiliary layer (see EP-282820) which requires additional expensive process steps for removal. The smooth slope of the via sides allows good sidewall coverage with aluminium by vapour deposits or sputtering so that no critical edge breakage occurs at the via sides during circuit operation.

Tapering via prodn. esp. in multilevel circuits - by etching insulation layers with different etch rates

A motion sensor, in particular for measuring oscillating, tilting or accelerated motion, is manufactured from a monocrystalline silicon wafer. At least one vertical paddle perpendicular to the wafer surface, which is capable of oscillating in the plane of the wafer, is etched out of the silicon wafer. Means for evaluating the deflection of the at least one paddle are also provided. The front face and rear face of the silicon wafer are (110) surfaces and the delimiting side walls of the etched depression are (111) surfaces. The at least one paddle is arranged in function of the crystallographic angles which form the (111) planes with and in the (110) plane.

Martin Warth

Papers

Verfahren zur strukturierung eines halbleiterkoerpers

Process for structuring a semiconductor body

Kristallorientierter bewegungssensor und verfahren zu dessen herstellung

Tapering via prodn. esp. in multilevel circuits - by etching insulation layers with different etch rates

Crystal-oriented motion sensor and process for manufacturing it