Disclosed is a method of distributing a number of reference clocks across a packet network. The packet network has a master node and one or more slave nodes, the master node and each slave node having basis clocks. A sender sends time-stamped synchronization packets to said one or more slave nodes, and a receiver at the slave nodes receives the time-stamped synchronization packets and synchronizes the basis clocks in the slave nodes with the basis clock in the master node. Multiple reference clocks are encoded with respect to the basis clock in the master node to generate numerical information describing the reference clock(s) in relation to the basis clock in the master node. The basis clock in each of the slave node is synchronized to the basis clock in the master node using time-stamped synchronization packets. The one or more reference clocks are recovered at the slave nodes using said numerical information describing the reference clock(s) in relation to the basis clock in the master node.

Method providing distribution means for reference clocks across packetized networks

A communication system is provided which allows synchronous devices in different synchronous communication networks to have synchronous communications with one another via an asynchronous communication network. In the communication system of the present invention, a master communication device generates a master clock based on a reference clock which is provided by a clock supplier. The master communication device sends a synchronization information frame, which contains information about the generated master clock, to plural slave communication devices via the asynchronous communication network. The slave communication devices each reproduce the master clock from the received synchronization information frame.

Communication system, master communication device, and slave communication device

The frequency of a local clock of a local data processor in communication with an asynchronous switched packet network is synchronized to the frequency of a reference clock of a source data processor also coupled to the network. Timing packets each including a field containing the destination address of the local processor and a field containing reference clock data indicating the time at which the packet is launched onto the network are sent to the local data processor from the source data processor across the network. The frequency of the local clock is controlled in dependence on the reference clock data and the times of arrival of the packets.

Frequency synchronisation of clocks

A server system has, in addition to extensibility of scale-out type of a braid server system, extensibility of scaleup type by making SMP coupling among nodes. Each node has a unit for SMP coupling to other nodes and a module management unit of each node responds to system configuration information to switch between mode in which the node operates singularly as a braid server and mode in which the node operates as a constituent module of an SMP server. Links among individual nodes are laid through equidistant wiring lines on a back plane and besides a loop wiring line having length equal to that of the inter-node link on back plane is also laid in each node, thereby setting up synchronization among nodes. Each node has a reference clock distribution unit mounted on back plane and adapted to distribute reference clocks to individual nodes and by switching reference clocks by a clock distributor inside each node, synchronization of reference clocks for SMP coupled nodes can be established.

Multi node server system

PROBLEM TO BE SOLVED: To solve the problem that it was conventionally difficult to achieve highly accurate time synchronization in a packet network which does not support Transparent Clock.SOLUTION: The present invention is characterized in that a device on the transmission side transmits a reference packet containing a sequence number and transmission interval information along with a time synchronization packet at a certain transmission interval, and a device on the reception side determines the order of received packets by sequence numbers and activates a transmission interval timer which counts transmission intervals on the basis of the first reference packet received from the device on the transmission side. And, if a reception interval of the second and subsequent reference packets is less than the transmission interval output by the transmission interval timer, the device on the reception side resets the transmission interval timer, or if the reception interval is equal to or greater than the transmission interval output by the transmission interval timer, it does not reset the transmission interval timer. In this way, fluctuations in delay in packets received from the device on the transmission side are found on the basis of the transmission interval output by the transmission interval timer, whereby a discrepancy in the time of day with the device on the transmission side is adjusted.

Time synchronization method and time synchronization device

PROBLEM TO BE SOLVED: To solve the problem where the time during which synchronous control is completed cannot be predicted due to frequency difference being controlled without its being ascertained. SOLUTION: This IP terminal device provided with a synchronization function, which receives a synchronous timing packet transmitted by anther IP terminal device in a fixed interval and makes an internally generated clock synchronize with the clock of a transmitting side, is provided with the following means. The IP terminal device is provided with a clock generating means for generating an internal clock (1), a clock counter for counting the internal clock generated by the clock generating means (2), and a control means which estimates the frequency difference between the transmitting side clock and the clock generated by the clock generating means, on the basis of the finite difference between the count value of a clock counter when the first received synchronous timing packet after communication start is received and the count value of the counter clock, when a synchronous timing packet received after that is received and performs phase shift control of the clock generating means according to the estimation results. COPYRIGHT: (C)2001,JPO

Ip terminal device, method for estimating frequency error range, method of estimating frequency difference and method of calculating estimated required time

Masanori Shimada

Papers

Ip terminal device, method for estimating frequency error range, method of estimating frequency difference and method of calculating estimated required time

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