M
Masayuki Tanaka
Researcher at Toshiba
Publications - 196
Citations - 2132
Masayuki Tanaka is an academic researcher from Toshiba. The author has contributed to research in topics: Layer (electronics) & Electrode. The author has an hindex of 21, co-authored 196 publications receiving 2047 citations. Previous affiliations of Masayuki Tanaka include Microsoft & Brunel University London.
Papers
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Stabilization and smoothing of pressure in MPS method by Quasi-Compressibility
TL;DR: A method to stabilize simulations and suppress the pressure oscillation in Moving Particle Semi-implicit method for an incompressible fluid is presented and the Quasi-Compressibility is also introduced for stabilization.
Patent
Semiconductor memory device and method of manufacturing the same
TL;DR: In this article, a semiconductor memory device includes an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film provided on the floating gate, containing a metal element, a control gate, and source/drain regions provided in the substrate.
Patent
Unused time slot detection and selection in a mobile radio communication system
TL;DR: In this paper, the transmission signal is arranged into time frames each having a plurality of time-division multiplexed slots, and a radio channel establishing circuit establishes a channel between the mobile radio communication apparatus and the base station in accordance with the selected time slot.
Patent
Semiconductor device having a gate insulating film structure including an insulating film containing metal, silicon and oxygen and manufacturing method thereof
Yoshitaka Tsunashima,Seiji Ihumiya,Yasumasa Suizu,Yoshio Ozawa,Kiyotaka Miyano,Masayuki Tanaka +5 more
TL;DR: In this article, a gate insulating film structure with a laminated structure of an amorphous metal oxide film and a metal silicate film was described, which contained metal, silicon and oxygen.
Patent
Nonvolatile semiconductor memory and manufacturing method for the same
TL;DR: In this article, the memory cell matrix encompasses a plurality device isolation films running along column direction, first conductive layers arranged along row and column-directions, adjacent groups of the first conductives are isolated from each other by the device isolation film disposed between the adjacent groups, lower inter-electrode dielectrics arranged respectively on crests of the corresponding first conductivity layers, an upper inter-ear electrodes dielectric arranged on the lower interelectrodes, made of insulating material different from the lower, and a second conductivity layer running along