The embodiments described herein methods and devices that enhance the endurance of a non-volatile memory (e.g., flash memory). The method includes obtaining, for each of the plurality of die, an endurance metric. The method also includes sorting the plurality of die into a plurality of die groups based on their corresponding endurance metrics, where each die group includes one or more die and each die group is associated with a range of endurance metrics. In response to a write command specifying a set of write data, the method further includes writing the write data to the non-volatile memory by writing in parallel subsets of the write data to the one or more die assigned to a single die group of the plurality of die groups.

Device and method for managing die groups

The present invention is directed to a method and information handling system (IHS) for improving system performance in a storage area network. An embodiment of the present invention begins by obtaining diagnostic data for the storage area network by asking a user one or more questions and storing results to the one or more questions. Next, test data is obtained by running one or more testing modules on at least one component of the storage area network. A performance analysis of the storage area network is executed, including the obtained diagnostic data and the obtained test data. Then, one or more performance issues and one or more action plans for resolution are identified based upon the analysis. Finally, a report to one or more users is provided including the one or more identified performance issues and the one or more action plans.

SAN performance analysis tool

Systems and methods for retaining data in non-volatile solid-state are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller can comprise a data retention module configured to issue copy commands within different periods of time, and to maintain usage data on a storage subsystem. A refresh copy operation helps ensure that data written to memory retain integrity by causing data to be programmed again onto the memory, which minimizes the risk of data error caused by electron leak in the non-volatile solid-state memory. One or more data structures may be used to determine memory blocks that require refresh copy operations. In one embodiment, a validity bit array is used to track blocks that contain valid data. In another embodiment, a least recently used list is used to track blocks that have been least recently written.

System and method for performing data retention in solid-state memory using copy commands and validity and usage data

Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.

Managing the write performance of an asymmetric memory system

A data storage device may comprise a plurality of Multi-Level Cell (MLC) non-volatile memory devices comprising a plurality of lower pages and a corresponding plurality of higher-order pages. A controller may be configured to write data to and read data from the plurality of lower pages and the corresponding plurality of higher-order pages. A buffer may be coupled to the controller, which may be configured to accumulate data to be written to the MLC non-volatile memory devices, allocate space in the buffer and write the accumulated data to the allocated space. At least a portion of the accumulated data may be written in a lower page of the MLC non-volatile memory devices and the space in the buffer that stores data written to the lower page may be de-allocated when all higher-order pages corresponding to the lower page have been written in the MLC non-volatile memory devices.

Methods and devices for avoiding lower page corruption in data storage devices

Systems and methods are disclosed for managing a non-volatile memory (“NVM”), such as a flash memory. To prevent data errors due to leakage effects, the NVM may be refreshed. For example, a reserved portion of the NVM may be selected, and a predetermined pattern can be stored into the reserved portion. The reserved portion can then be monitored for storage deterioration over time. After determining that storage deterioration of the reserved portion has occurred, the NVM can be refreshed. In some embodiments, a controller can attempt to distinguish data errors due to leakage effects from data errors due to disturb issues.

Systems and methods for refreshing non-volatile memory

Methods, machine-readable tangible storage media, and data processing systems that enable a debug host device to acquire memory dump information from a debug target device after the target device suffers an unrecoverable system malfunction are disclosed. In one embodiment, data in the volatile memory on a debug target device is accessed via a hardware integrated debug framework, which is also used to access data on a nonvolatile electronically erasable semiconductor memory of a debug target device, and one or more registers of one or more processors on a debug target device, and a core dump is created on the debug host device.

Enhanced debugging for embedded devices

Systems and methods are disclosed for trim token journaling A device can monitor the order in which trim commands and write commands are applied to an indirection system stored in a volatile memory of the device In some embodiments, the device can directly write to a page of an NVM with a trim token that indicates that a LBA range stored in the page has been trimmed In other embodiments, a device can add pending trim commands to a trim buffer stored in the volatile memory Then, when the trim buffer reaches a pre-determined threshold or a particular trigger is detected, trim tokens associated with all of the trim commands stored in the trim buffer can be written to the NVM Using these approaches, the same sequence of events that was applied to the indirection system during run-time can be applied during device boot-up

Trim token journaling

Systems and methods are disclosed for dynamically allocating power for a system having non-volatile memory. A power budgeting manager of a system can determine if the total amount of power available for the system is below a pre-determined power level (e.g., a low power state). While the system is operating in the low power state, the power budgeting manager can dynamically allocate power among various components of the system (e.g., a processor and non-volatile memory).

Dynamic allocation of power budget for a system having non-volatile memory

Systems, apparatuses, and methods are provided for whitening and managing data for storage in non-volatile memories, such as Flash memory. In some embodiments, an electronic device such as media player is provided, which may include a system-on-a-chip (SoC) and a non-volatile memory. The SoC may include SoC control circuitry and a memory interface that acts as an interface between the SoC control circuitry and the non-volatile memory. The SoC can also include an encryption module, such as a block cipher based on the Advanced Encryption Standard (AES). The memory interface can direct the encryption module to whiten all types of data prior to storage in the non-volatile memory, including sensitive data, non-sensitive data, and memory management data. This can, for example, prevent or reduce program-disturb problems or other read/write/erase reliability issues.

Matthew Byom

Papers

Systems and methods for refreshing non-volatile memory

Enhanced debugging for embedded devices

Trim token journaling

Dynamic allocation of power budget for a system having non-volatile memory

Data whitening for writing and reading data to and from a non-volatile memory