M
Md. Mainul Islam
Researcher at Kookmin University
Publications - 16
Citations - 198
Md. Mainul Islam is an academic researcher from Kookmin University. The author has contributed to research in topics: Computer science & Field-programmable gate array. The author has an hindex of 4, co-authored 11 publications receiving 53 citations.
Papers
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Journal ArticleDOI
FPGA Implementation of High-Speed Area-Efficient Processor for Elliptic Curve Point Multiplication Over Prime Field
TL;DR: In this article, a high-speed elliptic curve cryptographic (ECC) processor that performs fast point multiplication with low hardware utilization is presented, which is a crucial demand in the fields of cryptography and network security.
Journal ArticleDOI
Area-Time Efficient Hardware Implementation of Modular Multiplication for Elliptic Curve Cryptography
TL;DR: An area-time efficient hardware implementation of modular multiplication over five National Institute of Standard and Technology (NIST)-recommended prime fields is proposed for lightweight elliptic curve cryptography (ECC) and a modified radix- 2 interleaved algorithm is proposed to reduce the time complexity of conventional interleaves modular multiplication.
Proceedings ArticleDOI
The Role of Deep Learning in NOMA for 5G and Beyond Communications
Moh. Khalid Hasan,Md. Shahjalal,Md. Mainul Islam,Md. Morshed Alam,Md. Faisal Ahmed,Yeong Min Jang +5 more
TL;DR: The applications of the DL methods in NOMA for 5G and beyond communications and the deep neural networks that are employed in NomA are listed up and discussed.
Proceedings ArticleDOI
An Overview of AI-Enabled Remote Smart- Home Monitoring System Using LoRa
Md. Shahjalal,Moh. Khalid Hasan,Md. Mainul Islam,Md. Morshed Alam,Md. Faisal Ahmed,Yeong Min Jang +5 more
TL;DR: A long range (LoRa) based SH system is proposed for remote monitoring and maintenance of IoT sensors and devices using artificial intelligence (AI) concept and an AI-based data flow system for IoT server and cloud is presented.
Journal ArticleDOI
Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve.
TL;DR: This paper proposes a high-speed, low-area, simple power analysis (SPA)-resistant field-programmable gate array (FPGA) implementation of ECC processor with unified point addition on a twisted Edwards curve, namely Edwards25519.