Frequency translation and applications of same are described herein, including wireless local area network (WLAN) applications such as IEEE Standard 802.11 WLANs. Such applications include, but are not limited to, frequency down-conversion, frequency up-conversion, enhanced signal reception, unified down-conversion and filtering, and combinations and applications of same.

Wireless local area network (WLAN) technology and applications including techniques of universal frequency translation

Methods, systems, and apparatuses, and combinations and sub-combinations thereof, for down-converting and up-converting an electromagnetic (EM) signal are described herein. Briefly stated, in embodiments the invention operates by receiving an EM signal and recursively operating on approximate half cycles (½, 1½, 2½, etc.) of the carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal. Up-conversion is accomplished by controlling a switch with an oscillating signal, the frequency of the oscillating signal being selected as a sub-harmonic of the desired output frequency.

Method and system for down-converting and up-converting an electromagnetic signal, and transforms for same

The present invention includes a system and method for ensuring reception of a communications signal. A modulating baseband signal with desired information is accepted, and a plurality of redundant spectrums is generated. Each redundant spectrum comprises the necessary amplitude, phase, and frequency information to substantially reconstruct the modulating baseband signal. It is expected but not required that the redundant spectrums will be generated at a first location and sent to a second location over a communications medium. At the second location, the redundant spectrums are independently processed to recover a demodulating baseband signal for each of the redundant spectrums. In one embodiment, an error detection process is employed at the second location to detect and eliminate those demodulated baseband signals that have been corrupted during transmission. An error-free demodulated baseband signal is selected from the remaining demodulated baseband signals. The error-free demodulated baseband signal is representative of the modulating baseband signal sent over the communications medium.

Method and system for ensuring reception of a communications signal

Methods and apparatuses for reducing DC offsets in a communication system are described. In a first aspect, a feedback loop circuit reduces DC offset in a wireless local area network (WLAN) receiver channel. The frequency response of the feedback loop circuit can be variable. In a second aspect, a circuit provides gain control in a WLAN receiver channel. First and second automatic gain control (AGC) amplifiers are coupled in respective portions of the receiver channel. Circuits for monitoring DC offset, and for providing control signals for controlling the frequency response of the DC offset reducing circuits are also provided.

Method and apparatus for reducing DC offsets in a communication system

A communication system comprising a multi-protocol, multi-bearer sub-system is described herein. The sub-system is a universal platform module that can transmit and receive one or more information signals in one or more protocols using one or more bearer services. In one embodiment, the sub-system may form a portion of a transceiver that is composed of a transmitter and a receiver, and which is a gateway server between a personal area network (PAN) and the global wireless network.

Universal platform module and methods and apparatuses relating thereto enabled by universal frequency translation technology

A frequency converter uses first and second complementary symmetry FET's to perform respective oscillator and mixer functions. The first and second FET's are arranged with respective conduction channels connected in series. The oscillator function is performed by the first FET via feedback provided between its source or drain electrode to its gate electrode. The mixer function is provided by the second FET via an input circuit coupling an input signal to its gate electrode. Sum and difference beat frequencies are available at the circuit node interconnecting the conduction channels of the first and second FET's.

Complementary symmetry FET frequency converter circuits

An operational amplifier employing complementary MOSFET transistors includes first and second differential amplifiers respectively employing complementary conductivity type transistors. The input connections of the first and second differential amplifiers connect in parallel to receive the same input signal, the common-mode voltage of which may vary to and include first and second supply potentials. First and second current mirror amplifiers, respectively employing complementary conductivity type transistors, have input connections to which first and second output connections of the first differential amplifier respectively connect, and have output connections connected to an output terminal. Third and fourth current mirror amplifiers, respectively employing complementary conductivity type transistors, have input connections to which first and second output connections of the second differential amplifier respectively connect, and have output connections connected to the output terminal.

Operational amplifier employing complementary field-effect transistors

A complementary or quasi-complementary Class B transistor amplifier stage, the halves of which have their output circuits serially connected between relatively negative and relatively positive operating supply voltages to receive direct current and are operated in push-pull with each other for signal to supply a common load from the interconnection of their output circuits, has driver circuitry including a pair of field effect transistors operated in push-pull to supply respective halves of the Class B transistor amplifier. A p-channel field effect transistor with source electrode connected to the relatively positive operating supply voltage drives one half of the Class B transistor amplifier stage from its drain electrode, and an n-channel field effect transistor with source electrode connected to the relatively negative operating supply voltage drives the other half of the Class B transistor amplifier stage. The field effect transistors in the driver circuitry are enhancement-mode types permitting their gate electrodes to be connected together to receive input signal potential, avoiding the need for voltage translating circuitry to secure their push-pull operation.

Complementary-FET driver circuitry for push-pull class B transistor amplifiers

The amplifiers of the present application all include at least two pairs of complementary, metal-oxide-semiconductor (COS/MOS) transistors, each pair quiescently biased to operate as a linear amplifier. An input signal is applied in one phase to the input circuit of one COS/MOS pair and in opposite phase to the input circuit of the other COS/MOS pair. The output signal appears across a load circuit which is connected at one terminal to the joined drain electrodes of one COS/MOS pair and at its other terminal to the joined drain electrodes of the other COS/MOS pair.

Bridge amplifiers employing complementary transistors

Series-connected, field-effect transistors (FET's) of complementary conductivity types are employed to mix two or more input signals. The transistors are quiescently biased in their linear operating range. Each input signal is applied to the gate electrode of one FET and the gate electrode of the corresponding FET of opposite conductivity type in the series string. The output signal containing sum and difference frequencies is available at a common drain connection between two adjacent transistors of opposite conductivity types at the center of the string.

Merle V. Hoover

Papers

Complementary symmetry FET frequency converter circuits

Operational amplifier employing complementary field-effect transistors

Complementary-FET driver circuitry for push-pull class B transistor amplifiers

Bridge amplifiers employing complementary transistors

Complementary symmetry fet mixer circuits