Separate phase (or frequency/phase) detectors (11,13) are used in separate feedback loops of a phase-locked loop, one of the detectors having a dead zone (11) and the other detector having no dead zone (13). The dead zone of the one detector (11), rather than being regarded as undesirable as in the prior art, is used to gradually shift the effective loop bandwidth of the phase-locked loop from a wide bandwidth to a narrow bandwidth without requiring any deliberate control action or switching circuitry.

A multi-loop controlled VCO

A phase locked loop (PLL) comprising an input, an output, a charge generator, a low pass filter 3 , an oscillator 4 and a frequency divider 5 . The frequency divider 5 has an input coupled to the output of the PLL and an output coupled to an input of the charge generator. The frequency at the output of the frequency divider 5 is equal to the frequency at the input of the frequency divider divided by a selectable divider ratio N. The PLL has a damping factor z and a bandwidth to compare frequency ratio ω 3 /ω ref . The low pass filter 3 has a first capacitor for integrating the charge produced by the charge generator. The capacitance of that first capacitor is arranged to be proportional to the divider ratio N so that the damping factor z and the bandwidth to compare frequency ratio ω 3 /ω ref are substantially independent of the divider ratio N.

Use of configurable capacitors to tune a self biased phase locked loop

A sigma-delta fractional-N phase locked loop has faster lock time with increased charge pump current and decreased loop filter resistance in the unlock state. On the other hand, the sigma-delta fractional-N phase locked loop has lower noise susceptibility and lower frequency error with gradual decrease in charge pump current and gradual increase in loop filter resistance, in the lock state.

Sigma-delta fractional-N PLL with reduced frequency error

The present invention is intended to reliably achieve a locked PLL even with a short VFO field to correctly perform subsequent reproduction of information data. A PLL circuit of the present invention is supplied with a composite signal composed of a repetitive signal including a pulse train of a constant duty ratio and a random signal including a pulse train allowing variations in duty ratio, where the two signals are arranged in time series. The circuit is provided with a VCO for generating an output signal having a frequency according to a control signal, a PFC for comparing the repetitive signal with the output signal in terms of phase and frequency to generate a phase frequency error signal, a PC for comparing the random signal with the output signal to generate a phase error signal, and loop filters for extracting predetermined band components of the phase frequency error signal and the phase error signal to generate the control signal. Since a PLL is formed including the phase frequency comparator, which has a wide dynamic range and operates at a single lock point, during reading a VFO, a reliable drawing operation is achieved even with a short VFO without miss lock.

Phase locked loop circuit

A method of, a device for, and a storage medium for recovering horizontal synchronization from a TV-signal with the use of a PLL. The number of periods during which a predetermined degree of synchronization persists is counted and the result of the counting decreases the bandwidth of the PLL when said number of periods increases.

Recovering horizontal synchronization

A method and apparatus for combining a plurality of different filtering paths of varying bandwidth to provide selectable bandwidth signal filtering without transients caused by initialization of filter components. The signal to be filtered is applied to a plurality of parallel connected passband filters ranging from a widest passband filter to a narrowest passband filter. The bandwidth of the parallel filter combination is progressively narrowed by sequentially holding the output level of each of the filters in declining order of their passband frequency range, beginning with the widest passband filter, until all of the output levels of the filters are held constant except for the narrowest passband filter. This filter system is especially adapted for use as a loop filter in a phase locked loop control system incorporated in a data storage disc drive.

Michael D. Leis

Papers

Multiple bandwidth filter system for phase locked loop