An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

An apparatus (20) for processing a substrate (32) in a processing system having multiple process chambers (22) and a common transfer chamber (26) comprises a process chamber (22) having a process space (23) to receive and process a substrate (32) and a buffer chamber (24) defining a buffer space. The buffer chamber (24) is positioned beneath the process chamber (22) and is configured for interfacing with a transfer chamber (26) of a processing system for receiving a substrate (32) to be processed. A passage (43) is formed between the process and buffer chambers for moving a substrate between the process space and buffer space and a movable substrate stage (30) in the buffer space is operable for moving vertically in said passage (43) between a first position wherein the substrate is positioned in the buffer space and a second position wherein the substrate is positioned within the process space of the process chamber (22). A sealing mechanism (42) is operable for sealing said passage to isolate the process chamber and a pumping system (52) is coupled to the buffer chamber for purging the buffer space of contaminants which may leak from the process chamber (22) to generally reduce the escape of the contaminants through the buffer chamber (24) and into the common transfer chamber (26) and other process chambers of a multiple chamber system.

Buffer chamber and method for integrating physical and chemical vapor deposition chambers together in a processing system

A method is provided for depositing aluminum thin film layers to form improved quality contacts in a semiconductor integrated circuit device. All or some of the deposition process occurs at relatively low deposition rates at a temperature which allows improved surface migration of the deposited aluminum atoms. Aluminum deposited under these conditions tends to fill contact vias without the formation of voids. The low temperature deposition step can be initiated by depositing aluminum while a wafer containing the integrated circuit device is being heated from cooler temperatures within the deposition chamber.

Method for forming a metal contact

A wiring layer of a semiconductor device having a novel contact structure is disclosed. The semiconductor device includes a semiconductor substrate, an insulating layer having an opening (contact hole or via), a reactive spacer formed on the sidewall of the opening or a reactive layer formed on the sidewall and on the bottom surface of the opening and a first conductive layer formed on the insulating layer which completely fills the opening. Since the reactive spacer or layer is formed on the sidewall of the opening, when the first conductive layer material is deposited, large islands will form to become large grains of the sputtered Al film. Also, providing the reactive spacer or layer improves the reflow of the first conductive layer during a heat-treating step for filling the opening at a high temperature below a melting temperature. Thus, complete filling of the opening with sputtered Al can be ensured. All the contact holes, being less than 1 μm in size and having an aspect ratio greater than 1.0, can be completely filled with Al, to thereby enhance the reliability of the wiring of a semiconductor device.

Method for forming a wiring layer

A conductive layer is formed over an insulating layer and extending down into a contact opening. An insulating layer is then deposited over the device and in the opening, and etched back to form a plug of dielectric material in the bottom of the opening. An aluminum layer is then deposited over the device and in the opening under such conditions as to cause a substantially complete fill of the opening by the aluminum, and result in a planar surface above the opening.

Method of making an integrated circuit structure by using a non-conductive plug

A method for forming a metal layer includes the steps of forming an insulation layer having at least one step portion on a wafer; and forming the metal layer over the insulation layer. The metal layer is formed by depositing aluminum-based alloy by sputtering while the wafer is heated to a temperature higher than a predetermined temperature. As a result, at the step portion, a good step coverage can be obtained and the surface of the metal layer can be planarized. At the same time, the method according to the present invention contributes to a prevention of deterioration in the quality of the layer and facilitates a process to be carried out at a later stage.

Method for forming metal layer

A method for forming a metal layer includes the steps of forming an insulation layer (62) having at least one step portion on a wafer (48, 61); and forming the metal layer (63) over the insulation layer. The metal layer is formed by depositing aluminium-based alloy by sputtering while the wafer is heated to a temperature higher than that which produces a solid solution in the aluminium-based alloy. As a result at the step portion, a good step coverage can be obtained and the surface of the aluminium alloy layer is planarized. At the same time, the method according to the present invention contributes to a prevention of deterioration in the quality of the layer by preventing the formation of a silicon rich layer adjacent the insulating layer with interferes with a subsequent patterning process. The method also enables the deposition process to be carried out at a later stage.

Minoru Hainesu Mizonokuchi Inoue

Papers

Method for forming metal layer

Method for forming metal layer for a semiconductor device